4.3

Debug management

This part will contain the required registers for the debug mode.

4.3.1

STM32W108xx DBG Overview

The GPIO PC trace control register GPIO_PCTRACECR is added to selects PC trace source on baseband debug GPIO pins.

Table 13 gives the list of the changes (renaming) made in the DBG bits and registers.

Table 13.

WDG bits and registers overview

Address

(DBG)

Register

STM32W108xx EXTI bits/registers naming overview

0x4028

GPIO_PCTRACECR

Reserved

SEL

0x402C-

0xBBFC

Reserved

0xBC00

GPIO_DBGCFG

Reserved

GPIO_DE

BUGDIS

GPIO_EXT

REGEN

Reserved

GPIO_DBGCR

Reserved

DBGDIS

EXTREGEN

Reserved

0xBC04

GPIO_DBGSTAT

Reserved

GPIO_

BOOTMODE

Reserved

GPIO_

FORCEDBG

GPIO_SWEN

GPIO_DBGSR

Reserved

BOOTMODE

Reserved

FORCEDBG

SWEN