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AN4228 数据表(PDF) 21 Page - STMicroelectronics |
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AN4228 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 90 page ![]() DocID024110 Rev 5 21/90 AN4228 Peripheral migration 89 3.4.2 Peripheral access configuration Since the address mapping of some peripherals has been changed in STM32F3 series versus STM32F1 series, you need to use different registers to [enable/disable] or [enter/exit] the peripheral [clock] or [from reset mode]. To configure the access to a given peripheral, you have first to know to which bus this peripheral is connected; refer to Table 8 then, depending on the action needed, program the right register as described in Table 11 above. For example, if USART1 is connected to the APB2 bus, to enable the USART1 clock you have to configure APB2ENR register as follows: RCC->APB2ENR |= RCC_APB2ENR_USART1EN; Table 11. RCC registers used for peripheral access configuration Bus Register Comments AHB RCC_AHBRSTR Used to [enter/exit] the AHB peripheral from reset RCC_AHBENR Used to [enable/disable] the AHB peripheral clock APB1 RCC_APB1RSTR Used to [enter/exit] the APB1 peripheral from reset RCC_APB1ENR Used to [enable/disable] the APB1 peripheral clock APB2 RCC_APB2RSTR Used to [enter/exit] the APB2 peripheral from reset RCC_APB2ENR Used to [enable/disable] the APB2 peripheral clock |
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