4

LT1124/LT1125

measured at

±2.5V.

Note 8: 0.1Hz to 10Hz noise can be inferred from the 10Hz noise voltage

density test. See the test circuit and frequency response curve for 0.1Hz to

10Hz tester in the Applications Information section of the LT1007 or

LT1028 data sheets.

Note 9: This parameter is guaranteed but not tested.

Note 10: The LT1124C/LT1125C and LT1124AC/LT1125AC are guaranteed

to meet specified performance from 0

°C to 70°C and are designed,

characterized and expected to meet these extended temperature limits, but

are not tested at –40

°C and 85°C. The LT1124AI and LT1124I are

guaranteed to meet the extended temperature limits.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: Typical parameters are defined as the 60% yield of parameter

distributions of individual amplifiers; i.e., out of 100 LT1125s (or 100

LT1124s) typically 240 op amps (or 120) will be better than the indicated

specification.

Note 3: This parameter is 100% tested for each individual amplifier.

Note 4: This parameter is sample tested only.

Note 5: This parameter is not 100% tested.

Note 6: The inputs are protected by back-to-back diodes. Current limiting

resistors are not used in order to achieve low noise. If differential input

voltage exceeds

±1.4V, the input current should be limited to 25mA.

ELECTRICAL C

C

LT1124AC

LT1124C

LT1125AC

LT1125C

SYMBOL

PARAMETER

CONDITIONS (Note 2)

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Input Offset Voltage

LT1124

q

35

120

45

170

µV

LT1125

q

40

140

50

210

µV

Average Input Offset

(Note 5)

q

0.3

1

0.4

1.5

µV/°C

∆Temp

Voltage Drift

Input Offset Current

LT1124

q

625

7

35

nA

LT1125

q

735

8

45

nA

Input Bias Current

q

±8

±35

±9

±45

nA

Input Voltage Range

q

±11.5 ±12.4

±11.5 ±12.4

V

CMRR

Common Mode Rejection Ratio

q

109

125

102

122

dB

PSRR

Power Supply Rejection Ratio

q

112

125

107

122

dB

Large-Signal Voltage Gain

q

4.0

15

2.5

14

V/

µV

q

1.5

3.5

1.0

2.5

V/

µV

Maximum Output Voltage Swing

q

±12.5 ±13.7

±12

±13.7

V

SR

Slew Rate

q

2.6

4

2.4

4

V/

µs

Supply Current per Amplifier

q

2.4

3

2.4

3

mA

unless otherwise noted. (Note 10)

LT1124AC/AI

LT1124C/I

LT1125AC

LT1125C

SYMBOL

PARAMETER

CONDITIONS (Note 2)

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Input Offset Voltage

LT1124

q

40

140

50

200

µV

LT1125

q

45

160

55

240

µV

Average Input Offset

(Note 5)

q

0.3

1

0.4

1.5

µV/°C

∆Temp

Voltage Drift

Input Offset Current

LT1124

q

15

40

17

55

nA

LT1125

q

15

50

17

65

nA

Input Bias Current

q

±15

±50

±17

±65

nA

Input Voltage Range

q

±11.4 ±12.2

±11.4 ±12.2

V

CMRR

Common Mode Rejection Ratio

q

107

124

101

121

dB

PSRR

Power Supply Rejection Ratio

q

111

124

106

121

dB

Large-Signal Voltage Gain

q

3.5

12

2.2

12

V/

µV

q

1.2

3.2

0.8

2.3

V/

µV

Maximum Output Voltage Swing

q

±12.5 ±13.6

±12

±13.6

V

SR

Slew Rate

q

2.4

3.9

2.1

3.9

V/

µs

Supply Current per Amplifier

q

2.4

3.25

2.4

3.25

mA