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LT1205CS 数据表(PDF) 3 Page - Linear Technology

部件名 LT1205CS
功能描述  150MHz Video Multiplexers
PDF  16 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT1205CS 数据表(HTML) 3 Page - Linear Technology

  LT1205CS Datasheet HTML 1Page - Linear Technology LT1205CS Datasheet HTML 2Page - Linear Technology LT1205CS Datasheet HTML 3Page - Linear Technology LT1205CS Datasheet HTML 4Page - Linear Technology LT1205CS Datasheet HTML 5Page - Linear Technology LT1205CS Datasheet HTML 6Page - Linear Technology LT1205CS Datasheet HTML 7Page - Linear Technology LT1205CS Datasheet HTML 8Page - Linear Technology LT1205CS Datasheet HTML 9Page - Linear Technology Next Button
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3
LT1203/LT1205
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SR
Slew Rate (Note 6)
180
300
V/
µs
FPBW
Full Power Bandwidth (Note 7)
VOUT = 2VP-P
28.6
47.7
MHz
tSEL
Channel-to-Channel Select Time (Note 8) RL = 10k
25
35
ns
Enable Time (Note 9)
RL = 1k
25
35
ns
Disable Time (Note 9)
RL = 1k
20
35
ns
tr, tf
Small-Signal Rise and Fall Time
VOUT = 250mVP-P, 10% to 90%
2.6
ns
Propagation Delay
VOUT = 250mVP-P
2.9
ns
Overshoot
VOUT = 250mVP-P
5%
Crosstalk (Note 10)
RS = 10Ω
90
dB
Chip Disabled Crosstalk (Note 10)
RL = 10Ω, EN Pin Voltage ≤ 0.8V
110
dB
Channel Select Output Transient
All VIN = 0V
50
mVP-P
tS
Settling Time
1%, VOUT = 1V
30
ns
Differential Gain (Note 11)
VS = ±15V, RL = 10k
0.02
%
Differential Phase (Note 11)
VS = ±15V, RL = 10k
0.02
DEG
Insertion Loss
RL = 100k, CL = 30pF, VOUT = 500mVP-P, f = 1MHz
0.02
dB
ELECTRICAL C
C
HARA TERISTICS
0
°C ≤ TA ≤ 70°C, ±5V ≤ VS ≤ ±15V, RL = 1k, pulse tested, EN pin open or high, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOUT
Output Voltage
VS = ±15V, VIN = ±2V, RL = 400Ω
q
±1.8
±1.90
V
VS = ±5V, VIN = ±2V, RL = 1k
q
±1.8
±1.94
V
Overload Swing (Note 1)
VS = ±15V, VIN = ±5V
q
±0.9
±1.5
V
VS = ±5V, VIN = ±5V
q
±0.9
±1.5
V
IOUT
Output Current
VS = ±15V, VIN = ±2V, RL = 400Ω
q
±4.5
±4.75
mA
VS = ±5V, VIN = ±2V, RL = 1k
q
±1.8
±2.00
mA
ROUT
Enabled Output Resistance
EN Pin Voltage = 2V, VOUT = ±2V, VS = ±15V
q
20
42
Ω
Disabled Output Resistance
EN Pin Voltage = 0.5V, VOUT = ±2V, VS = ±15V
q
110
M
Ω
IS
Supply Current (LT1203)
EN Pin Voltage = 2V
q
10.0
14
mA
EN Pin Voltage = 0.5V
q
5.8
8
mA
Supply Current (LT1205)
EN Pin Voltage = 2V
q
20.0
28
mA
EN Pin Voltage = 0.5V
q
11.6
16
mA
VIL
Logic Low
Logic Pin
q
0.8
V
VIH
Logic High
Logic Pin
q
2V
Enable Low
EN Pin
q
0.5
V
Enable High
EN Pin
q
2V
IIL
Digital Input Current Low
LT1203 Pin 5, LT1205 Pins 9, 13 = 0V
q
1.5
6.5
µA
IIH
Digital Input Current High
LT1203 Pin 5, LT1205 Pins 9, 13 = 5V
q
10
200
nA
IEN
Enable Pin Current
LT1203 Pin 6, LT1205 Pins 10, 14
q
20
80
µA
CC
HARA TERISTICS
AC
TA = 25°C, VS = ±15V, RL = 1k, EN pin open or high, unless otherwise noted.
The q denotes specifications which apply over the specified
temperature range.
Note 1: The analog inputs (pins 1, 3 for the LT1203, pins 1, 3, 5, 7 for the
LT1205) are protected against ESD and overvoltage with internal SCRs.
For inputs
≤±2.8V the SCR will not fire. Voltages above 2.8V will fire the
SCR and the DC current should be limited to 20mA. To turn off the SCR
the pin voltage must be reduced to less than 1V or the current reduced to
less than 600
µA.



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