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LT1339C 数据表(PDF) 13 Page - Linear Technology

部件名 LT1339C
功能描述  High Power Synchronous DC/DC Controller
PDF  20 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT1339C 数据表(HTML) 13 Page - Linear Technology

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LT1339
APPLICATIONS INFORMATION
For duty cycles less than 50% (DC < 0.5), SX is negative
and is not required. For duty cycles greater than 50%, SX
takes on values dependent on S1 and duty cycle. This leads
to a minimum inductance requirement for a given VIN and
duty cycle of:
L
V
S
DC
MIN
IN
X
=


()
21
The LT1339 contains an internal SX slope compensation
ramp that has an equivalent current referred value of:
0.084
f
R
O
SENSE


Amp/s
where fO is oscillator frequency. This yields a minimum
inductance requirement of:
L
VR
DC
f
MIN
IN
SENSE
O
()(
)
()
()( )
21
0 084
.
A down side of slope compensation is that, since the IC
servo loop senses an increase in perceived inductor cur-
rent, the internal current limit functions are affected such
that the maximum current capability of a regulator is
reduced by the same amount as the effective current
referred slope compensation. The LT1339, however, uses
a current limit scheme that is independent of slope com-
pensation effects (average current limit). This provides
operation at any duty cycle with no reduction in current
sourcing capability, provided ripple current peak ampli-
tude is less than 15% of the current limit value. For
example, if the supply is set up to current limit at 10A, as
long as the peak inductor current is less than 11.5A, duty
cycles up to 90% can be achieved without compromising
the average current limit value.
If an inductor smaller than the minimum required for
internal slope compensation (calculated above as LMIN) is
desired, additional slope compensation is required. The
LT1339 provides this capability through the SL/ADJ pin.
This feature is implemented by referencing this pin via a
resistor divider from the 5VREF pin to ground. The addi-
tional slope compensation will be affected at the point in
the oscillator waveform (at pin CT) corresponding to the
voltage set by the resistor divider. Additional slope com-
pensation can be calculated using the relation:
S
f
RR
XADD
O
EQ
SENSE
= ()( )
()(
)
2500
Amp/s
where REQ is the effective resistance of the resistor divider.
Actual compensation will be somewhat greater due to
internal curvature correction circuitry that imposes an
exponential increase in the slope compensation wave-
form, further increasing the effective compensation slope
up to 20% for a given setting.
OSCILLATOR
PERIOD
TIME
0
0
ab
∆I
T1
I2
I1
S1
S1
S2
S2
S1 + SX
1339 • F05
Figure 5. Inductor Current at DC > 50% and
Slope Compensation Adjusted Signal
DUTY CYCLE (DC)
0
0.4
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
LT1339 • F06
0.2
0.6
0.1
0.5
0.3
0.7 0.8 0.9
Figure 6. Maximum Ripple Current (Normalized)
vs Duty Cycle for Average Current Limit
Design Example:
VIN = 20V
VOUT = 15V (DC = 0.75)
RSENSE = 0.01Ω
fO = 100kHz
L = 5
µH
The minimum inductor usable with no additional slope
compensation is:



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