11

LT1360

Input Considerations

Each of the LT1360 inputs is the base of an NPN and a PNP

transistor whose base currents are of opposite polarity

and provide first-order bias current cancellation. Because

of variation in the matching of NPN and PNP beta, the

polarity of the input bias current can be positive or nega-

tive. The offset current does not depend on NPN/PNP beta

matching and is well controlled. The use of balanced

source resistance at each input is recommended for

applications where DC accuracy must be maximized.

The inputs can withstand transient differential input volt-

ages up to 10V without damage and need no clamping or

source resistance for protection. Differential inputs, how-

ever, generate large supply currents (tens of mA) as

required for high slew rates. If the device is used with

sustained differential inputs, the average supply current

will increase, excessive power dissipation will result and

the part may be damaged. The part should not be used as

a comparator, peak detector or other open-loop applica-

tion with large, sustained differential inputs. Under

normal, closed-loop operation, an increase of power dis-

sipation is only noticeable in applications with large slewing

outputs and is proportional to the magnitude of the

differential input voltage and the percent of the time that

the inputs are apart. Measure the average supply current

for the application in order to calculate the power dissipa-

tion.

Power Dissipation

The LT1360 combines high speed and large output drive

in a small package. Because of the wide supply voltage

range, it is possible to exceed the maximum junction

temperature under certain conditions. Maximum junction

Worst case power dissipation occurs at the maximum

supply current and when the output voltage is at 1/2 of

either supply voltage (or the maximum swing if less than

Example: LT1360CS8 at 70