LT1366CS8 datasheet(16/20 Pages) LINER

16 / 20 page

LT1366/LT1367

LT1368/LT1369

the 2 op amp loop to create a negative summing junction

at A1’s positive input

1. The circuit has low sensitivities for

center frequency and Q, which are set with the following

equations:

ω02 = 1/(R1 • C1 • R2 • C2)

where,

R1 = 1/(

ω0 • Q • C1) and R2 = Q/(ω0 • C2).

The DC bias applied to A2 and A4, half supply, is not

needed when split supplies are available. The circuit

swings rail-to-rail in the passband making it an excellent

anti-aliasing filter for ADCs. The amplitude response is flat

to 1kHz then rolls off at 80dB/decade.

TYPICAL APPLICATIONS

VOUT

10k

V+

VIN

22pF

SIGNAL AMP

CANCELLATION AMP

–

1/2 LT1366

1366 F10

Figure 10. Input Bias Current Cancellation

FREQUENCY (Hz)

100

–80

–60

–40

–20

–144

–72

180

144

108

–36

–108

–180

10k

1366 F09

GAIN

PHASE

10k

VCC

–

1/2 LT1366

1366 F11

Figure 11. Rail-to-Rail Potentiometer Buffer

Figure 9. Frequency Response of 4th Order Butterworth Filter

1James Hahn, “State Variable Filter Trims Predecessor’s Component Count,” Electronics, April

21, 1982.

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