11

LT1370

APPLICATIO S I FOR ATIO

Layout Considerations

For maximum efficiency, LT1370 switch rise and fall times

are made as short as possible. To prevent radiation and

high frequency resonance problems, proper layout of the

components connected to the switch node is essential. B

field (magnetic) radiation is minimized by keeping output

diode, switch pin and output bypass capacitor leads as

short as possible. Figure 3 shows recommended posi-

tions for these components. E field radiation is kept low by

minimizing the length and area of all traces connected to

the switch pin. A ground plane should always be used

under the switcher circuitry to prevent interplane

coupling.

The high speed switching current path is shown schemati-

cally in Figure 4. Minimum lead length in this path is

essential to ensure clean switching and low EMI. The path

including the switch, output diode and output capacitor is

the only one containing nanosecond rise and fall times.

Keep this path as short as possible.

More Help

For more detailed information on switching regulator

circuits, please see Application Note 19. Linear

Technology also offers a computer software program,

SwitcherCAD

ers. In addition, our Applications Department is always

ready to lend a helping hand.

Figure 4

LOAD

L1

SWITCH

NODE

LT1370 • F04

HIGH

FREQUENCY

CIRCULATING

PATH

NFB

GND

FB

S/S

C

D

KEEP PATH FROM

OUTPUT CAPACITORS

AND GROUND RETURN

AS SHORT AS POSSIBLE

C

LT1370 • F03

Figure 3. Layout Considerations— R Package

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