LT1381CS datasheet(5/8 Pages) LINER

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LT1381

PI FU CTIO S

C1+, C1–, C2 +, C2 – (Pins 1, 3, 4, 5): Commutating

Capacitor Inputs. These pins require two external capaci-

tors C

≥ 0.1µF: one from C1+ to C1– and another from C2+

to C2 –. C1 may be deleted if a separate 12V supply is

available and connected to pin C1+.

V+ (Pin 2): Positive Supply Output (RS232 Drivers).

V+

≈ 2VCC – 2.1V. This pin requires an external charge

storage capacitor C

≥ 0.1µF, tied to ground or VCC. Larger

value capacitors may be used to reduce supply ripple. With

multiple transceivers, the V+ and V – pins may be paralleled

into common capacitors.

V– (Pin 6): Negative Supply Output (RS232 Drivers).

V –

≈ –(2VCC – 3V). This pin requires an external charge

storage capacitor C

≥ 0.1µF. Larger value capacitors may

be used to reduce supply ripple. With multiple transceiv-

ers, the V+ and V – pins may be paralleled into common

capacitors.

TR2 OUT, TR1 OUT (Pin 7, 14): Driver Outputs at RS232

Voltage Levels. Driver output swing meets RS232 levels

for loads up to 3k. Slew rates are controlled for lightly

loaded lines. Output current capability is sufficient for

load conditions up to 2500pF. Outputs are in a high

impedance state when VCC = 0V. Outputs are fully short-

circuit protected from V – + 25V to V + – 25V. Applying

higher voltages will not damage the device if the over-

drive is moderately current limited. Short circuits on one

output can load the power supply generator and may

disrupt the signal levels of the other outputs. The driver

outputs are protected against ESD to

±10kV for human

body model discharges.

REC2 IN, REC1 IN (Pins 8, 13): Receiver Inputs. These

pins accept RS232 level signals (

±30V)intoaprotected5k

terminating resistor. The receiver inputs are protected

against ESD to

±10kV for human body model discharges.

Each receiver provides 0.4V of hysteresis for noise immu-

nity. Open receiver inputs assume a logic low state.

REC2 OUT, REC1 OUT (Pins 9, 12): Receiver Outputs with

TTL/CMOS Voltage Levels. Outputs are fully short-circuit

protected to ground or VCC with the power ON or OFF.

TR2 IN, TR1 IN (Pins 10, 11): RS232 Driver Input Pins.

These inputs are TTL/CMOS compatible. Inputs should

not be allowed to float. Tie unused inputs to VCC.

GND (Pin 15): Ground Pin.

VCC (Pin 16): 5V Input Supply Pin. This pin should be

decoupled with a 0.1

µF ceramic capacitor close to the

package pin. Insufficient supply bypassing can result in

low output drive levels and erratic charge pump operation.

ESD PROTECTIO

The RS232 line inputs of the LT1381 have on-chip protec-

tion from ESD transients up to

±10kV. The protection

structures act to divert the static discharge safely to

system ground. In order for the ESD protection to function

effectively, the power supply and ground pins of the circuit

must be connected to ground through low impedances.

The power supply decoupling capacitors and charge pump

storage capacitors provide this low impedance in normal

application of the circuit. The only constraint is that low

ESR capacitors must be used for bypassing and charge

storage. ESD testing must be done with pins VCC, V+, V –

and GND shorted to ground or connected with low ESR

capacitors.

ESD Test Circuit

LT1381 • ESD TC

0.1

µF

RS232

LINE PINS

PROTECTED

±10kV

0.1

µF

0.1

µF

0.1

µF

C1+

V+

C1–

C2+

C2–

V–

TR2 OUT

LT1381

0.1

µF

5V VCC

GND

TR1 OUT

REC1 IN

REC1 OUT

TR1 IN

TR2 IN

RS232

LINE PINS

PROTECTED

±10kV

REC2 IN

REC2 OUT

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