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LT1496CS 数据表(PDF) 8 Page - Linear Technology |
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LT1496CS 数据表(HTML) 8 Page - Linear Technology |
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8 / 12 page ![]() 8 LT1495/LT1496 APPLICATIONS INFORMATION Start-Up Characteristics Micropower op amps are sometimes not micropower during start-up, wreaking havoc on low current supplies. In the worst case, there may not be enough supply current available to take the system up to nominal voltages. Figure 1 is a graph of LT1495 supply current vs supply voltage for the three limit cases of input offset that could occur during start-up. The circuits are shown in Figure 2. One circuit creates a positive offset, forcing the output to come up saturated high. Another circuit creates a negative offset, forcing the output to come up saturated low, while the last brings up the output at half supply. In all cases, the supply current is well behaved. Supply current is highest with the output forced high, so if one amplifier is unused, it is best to force the output low or at half supply. Reverse Battery The LT1495/LT1496 are protected against reverse battery voltages up to 18V. In the event a reverse battery condi- tion occurs, the supply current is typically less than 100nA (inputs grounded and outputs open). For typical single sup- ply applications with ground referred loads and feedback networks, no other precautions are required. If the reverse battery condition results in a negative voltage at either the input pins or output pin, the current into the pin should be limited by an external resistor to less than 10mA. Inputs While the LT1495/LT1496 will function normally with its inputs taken above the positive supply, the common mode range does not extend beyond approximately 300mV be- low the negative supply at room temperature. The device will not be damaged if the inputs are taken lower than 300mV below the negative supply as long as the current out of the pin is limited to less than 10mA. However, the output phase is not guaranteed and the supply current will increase. Output The graph, Capacitive Load Handling, shows amplifier sta- bility with the output biased at half supply. If the output is to be operated within about 100mV of the positive rail, the allowable load capacitance is less. With this output volt- age, the worst case occurs at AV = 1 and light loads, where the load capacitance should be less than 500pF with a 5V supply and less than 100pF with a 30V supply. Rail-to-Rail Operation The simplified schematic, Figure 3, details the circuit design approach of the LT1495/LT1496. The amplifier topology is a three-stage design consisting of a rail-to-rail input stage, that continues to operate with the inputs above the positive rail, a folded cascode second stage that develops most of the voltage gain, and a rail-to-rail com- mon emitter stage that provides the current gain. SUPPLY VOLTAGE (V) 0 5 4 3 2 1 5 1495 F01 01234 OUTPUT HIGH OUTPUT LOW OUTPUT VS/2 Figure 1. Start-Up Characteristics 1495 F02 OUTPUT HIGH VS – + OUTPUT AT VS/2 VS – + OUTPUT LOW VS – + VS/2 Figure 2. Circuits for Start-Up Characteristics |
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