| 数据搜索系统,热门电子元器件搜索 |
|
UPD75336 数据表(PDF) 21 Page - NEC |
|
|
|||||||||||||||||||||||||||||
UPD75336 数据表(HTML) 21 Page - NEC |
|
21 / 68 page ![]() 21 µPD75336 5.3 CLOCK OUTPUT CIRCUIT The clock output circuit is intended to output clock pulses from the P22/PCL pin and is used for remote control or to supply clock pulses to peripheral LSIs. • Clock output (PCL): Φ, 524 kHz, 262 kHz, 65.5 kHz (at 4.19 MHz operation) Fig. 5-2 Clock Output Circuit Configuration CLOM3 CLOM1CLOM0 0 Φ Internal Bus CLOM P22 Output Latch PORT2.2 Bit 2 of PMGB Bit Specified In Port 2 Input/Output Mode Output Buffer PCL/P22 fX/2 3 fX/2 4 fX/2 6 Selector From Clock Generator 4 Remarks The clock circuit is so configured that short-width pulses are not generated when clock output enable/disable is switched. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |