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LT1632CS8 数据表(PDF) 2 Page - Linear Technology

部件名 LT1632CS8
功能描述  45MHz, 45V/us, Dual/Quad Rail-to-Rail Input and Output Precision Op Amps
PDF  16 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT1632CS8 数据表(HTML) 2 Page - Linear Technology

  LT1632CS8 Datasheet HTML 1Page - Linear Technology LT1632CS8 Datasheet HTML 2Page - Linear Technology LT1632CS8 Datasheet HTML 3Page - Linear Technology LT1632CS8 Datasheet HTML 4Page - Linear Technology LT1632CS8 Datasheet HTML 5Page - Linear Technology LT1632CS8 Datasheet HTML 6Page - Linear Technology LT1632CS8 Datasheet HTML 7Page - Linear Technology LT1632CS8 Datasheet HTML 8Page - Linear Technology LT1632CS8 Datasheet HTML 9Page - Linear Technology Next Button
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2
LT1632/LT1633
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V + to V –) ............................. 36V
Input Current .....................................................
±10mA
Output Short-Circuit Duration (Note 2) ........ Continuous
Operating Temperature Range ................ – 40
°C to 85°C
Specified Temperature Range (Note 4) ..... – 40
°C to 85°C
Junction Temperature .......................................... 150
°C
Storage Temperature Range ................. – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300
°C
Consult factory for Military and Industrial grade parts.
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
LT1632CN8
LT1632CS8
ORDER PART
NUMBER
TJMAX = 150°C, θJA = 150°C/ W
TJMAX = 150°C, θJA = 130°C/ W (N8)
TJMAX = 150°C, θJA = 190°C/ W (S8)
LT1633CS
S8 PART MARKING
1
2
3
4
8
7
6
5
TOP VIEW
OUT A
– IN A
+ IN A
V –
V +
OUT B
– IN B
+ IN B
S8 PACKAGE
8-LEAD PLASTIC SO
N8 PACKAGE
8-LEAD PDIP
A
B
1632
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUTA
– IN A
+ IN A
V +
+ IN B
– IN B
OUT B
OUT D
– IN D
+ IN D
V –
+ IN C
– IN C
OUT C
A
D
B
C
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
VCM = V+
400
1350
µV
VCM = V–
400
1350
µV
∆VOS
Input Offset Shift
VCM = V– to V+
350
1500
µV
Input Offset Voltage Match (Channel-to-Channel) VCM = V–, V+ (Note 5)
500
2300
µV
IB
Input Bias Current
VCM = V+
0
1.15
2.2
µA
VCM = V–
– 2.2
– 1.15
0
µA
∆IB
Input Bias Current Shift
VCM = V– to V+
2.3
4.4
µA
Input Bias Current Match (Channel-to-Channel)
VCM = V+ (Note 5)
50
880
nA
VCM = V
– (Note 5)
50
880
nA
IOS
Input Offset Current
VCM = V+
40
440
nA
VCM = V
–
40
440
nA
∆IOS
Input Offset Current Shift
VCM = V
– to V+
80
880
nA
Input Noise Voltage
0.1Hz to 10Hz
400
nVP-P
en
Input Noise Voltage Density
f = 1kHz
12
nV/
√Hz
in
Input Noise Current Density
f = 1kHz
1.6
pA/
√Hz
CIN
Input Capacitance
5pF
AVOL
Large-Signal Voltage Gain
VS = 5V, VO = 300mV to 4.7V, RL = 10k
450
2000
V/mV
VS = 3V, VO = 300mV to 2.7V, RL = 10k
350
1500
V/mV
CMRR
Common Mode Rejection Ratio
VS = 5V, VCM = V
– to V+
70
83
dB
VS = 3V, VCM = V
– to V+
66
81
dB
TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted.
(Note 1)



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