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LTC1096LCS8 数据表(PDF) 7 Page - Linear Technology

部件名 LTC1096LCS8
功能描述  Low Voltage, Micropower Sampling 8-Bit Serial I/O A/D Converters
PDF  8 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1096LCS8 数据表(HTML) 7 Page - Linear Technology

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LTC1096L/LTC1098L
S
APPLICATI
I FOR ATIO
single-ended mode, all input channels are measured with
respect to GND.
LTC1098L Channel Selection
MUX ADDRESS
SGL/DIFF
1
1
0
0
ODD/SIGN
0
1
0
1
CHANNEL #
CH0
+
+
–
CH1
+
–
+
GND
–
–
LTC1096/8 • AI02
MSB-First/LSB-First (MSBF)
The output data of the LTC1098L is programmed for
MSB-first or LSB-first sequence using the MSBF bit.
When the MSBF bit is a logical one, data will appear on
the DOUT line in MSB-first format. Logical zeroes will be
filled in indefinitely following the last data bit. When the
MSBF bit is a logical zero, LSB-first data will follow the
normal MSB-first data on the DOUT line (see Figures 1
and 2).
ANALOG CONSIDERATIONS
Grounding
The LTC1096L/LTC1098L should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance
use a printed circuit board. The GND pin (Pin 4) should be
tied directly to the ground plane with minimum lead
length.
Bypassing
For good performance, the LTC1096L/LTC1098L VCC and
VREF pins must be free of noise and ripple. Any changes in
the VCC and VREF voltage with respect to ground during the
conversion cycle can induce errors or noise in the output
code. Bypass the VCC and VREF pins directly to the analog
ground plane with a minimum 0.1
µF capacitor and with
leads as short as possible. The LTC1098L combines VCC
and VREF into one pin, VCC(VREF), which can be bypassed
by a 0.1
µF capacitor.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1096L/
LTC1098L have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem. But if large source resistances are used or if slow
settling op amps drive the inputs, take care to ensure the
transients caused by the current spikes settle completely
before the conversion begins.
CLK
t CYC
CS
B7
B6
B5
B4
B3
B2
B1
B0
B1
B2
B3
B4
B5
B6
B7
NULL
BIT
Hi-Z
DOUT
LTC1096/98 F01
POWER
DOWN
Hi-Z
tsuCS
tWAKEUP
tCONV
FILLED
WITH
ZEROES
Figure 1. LTC1096L Operating Sequence



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