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UPD75P0016CU 数据表(PDF) 13 Page - NEC |
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UPD75P0016CU 数据表(HTML) 13 Page - NEC |
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13 / 60 page ![]() µPD75P0016 13 Data Sheet U10328EJ3V1DS00 SBS3 SBS2 SBS1 SBS0 F84H Address 3 2 1 0 SBS 0 0 1 1 0 1 0 1 Symbol Stack area specification Memory bank 0 Memory bank 1 0 Be sure to set 0 for bit 2. 0 1 Mk II mode Mk I mode Mode selection specification Setting prohibited 4.2 Setting of Stack Bank Selection (SBS) Register Use the stack bank selection register to switch between the Mk I mode and the Mk II mode. Figure 4-1 shows the format for doing this. The stack bank selection register is set using a 4-bit memory manipulation instruction. When using the Mk I mode, be sure to initialize the stack bank selection register to 100 ×B Note at the beginning of the program. When using the Mk II mode, be sure to initialize it to 000 ×B Note. Note Set the desired value for ×. Figure 4-1. Format of Stack Bank Selection Register Caution SBS3 is set to “1” after RESET input, and consequently the CPU operates in the Mk I mode. When using instructions for the Mk II mode, set SBS3 to “0” to enter the Mk II mode before using the instructions. |
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