4

LTC1386

PI FU CTIO S

with a 0.1

µF ceramic capacitor.

GND: Ground Pin.

≅

0.1

µF for charge storage. The capacitor may be tied to

may share a common capacitor. For large numbers of

devices, increasing the size of the shared common storage

capacitors is recommended to reduce ripple.

– 1.3V). This pin requires an external capacitor C = 0.1

µF

for charge storage.

pins require two external capacitors C = 0.1

µF: one from

charge pump efficiency, the capacitor’s effective series

resistance should be less than 2

Ω.

TR IN: EIA/TIA562 Driver Input Pins. Inputs are TTL/

CMOS compatible. The inputs of unused drivers can be left

included on chip.

TR OUT: Driver Outputs at EIA/TIA562 Voltage Levels.

The driver outputs are protected against ESD to

±10kV for

human body model discharges.

RX IN: Receiver Inputs. These pins can be forced to

±25V

without damage. The receiver inputs are protected against

ESD to

±10kV for human body model discharges. Each

receiver provides 0.4V of hysteresis for noise immunity.

RX OUT: Receiver Outputs with TTL/CMOS Voltage

Levels.

Figure 1. Driver Propagation Delay Timing

Figure 2. Receiver Propagation Delay Timing

SWITCHI G TI E WAVEFOR S

1.4V

0V

0V

0V

DRIVER

INPUT

DRIVER

OUTPUT

1.4V

LTC1386 • F01

0.8V

0V

2.4V

RX

INPUT

RX

OUTPUT

1.3V

1.7V

LTC1386 • F02

0V