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LTC1410CSW 数据表(PDF) 2 Page - Linear Technology |
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LTC1410CSW 数据表(HTML) 2 Page - Linear Technology |
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2 / 16 page ![]() 2 LTC1410 AVDD = DVDD = VDD (Notes 1, 2) Supply Voltage (VDD) ................................................ 6V Negative Supply Voltage (VSS) ............................... –6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) .................................. VSS – 0.3V to VDD + 0.3V Digital Input Voltage (Note 4) ............ VSS – 0.3V to 10V Digital Output Voltage ................... – 0.3V to VDD + 0.3V Power Dissipation ............................................. 500mW Operating Temperature Range LTC1410C .............................................. 0 °C to 70°C LTC1410I ........................................... – 40 °C to 85°C Storage Temperature Range ................ – 65 °C to 150°C Lead Temperature (Soldering, 10 sec)................. 300 °C A G A U A R BSOLUTEXI TI S PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER Consult factory for Military grade parts. PUT I A A LOG PARAMETER CONDITIONS MIN TYP MAX UNITS Resolution (No Missing Codes) q 12 Bits Integral Linearity Error (Note 7) q ±0.3 ±1 LSB Differential Linearity Error q ±0.3 ±1 LSB Offset Error (Note 8) ±2 ±6 LSB q ±8 LSB Full-Scale Error ±15 LSB Full-Scale Tempco IOUT(REF) = 0 q ±15 ppm/ °C TJMAX = 110°C, θJA = 90°C/W (SW) TJMAX = 110°C, θJA = 95°C/W (G) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 +AIN –AIN VREF REFCOMP AGND D11(MSB) D10 D9 D8 D7 D6 D5 D4 DGND AVDD DVDD VSS BUSY CS CONVST RD SHDN NAP/SLP OGND D0 D1 D2 D3 G PACKAGE 28-LEAD PLASTIC SSOP SW PACKAGE 28-LEAD PLASTIC SO WIDE TOP VIEW LTC1410CG LTC1410CSW LTC1410IG LTC1410ISW CC HARA TERISTICS CO VERTER The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. With Internal Reference (Notes 5, 6) The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Analog Input Range (Note 9) 4.75V ≤ VDD ≤ 5.25V, –5.25V ≤ VSS ≤ –4.75V q ±2.5 V IIN Analog Input Leakage Current CS = High q ±1 µA CIN Analog Input Capacitance Between Conversions 17 pF During Conversions 5 pF t ACQ Sample-and-Hold Acquisition Time q 50 100 ns t AP Sample-and-Hold Aperture Delay Time –1.5 ns tjitter Sample-and-Hold Aperture Delay Time Jitter 5 psRMS CMRR Analog Input Common Mode Rejection Ratio – 2.5V < (– AIN = AIN) < 2.5V 60 dB |
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