LTC1421 datasheet(13/24 Pages) LINER

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LTC1421/LTC1421-2.5

APPLICATIONS INFORMATION

signal is pulled high, turning off the switches. After the

board supply voltage ramps up and RESET goes high,

DISABLE will pull low enabling the switches.

Board Insertion Timing

When the board is inserted, GND pin makes contact first,

followed by VCCHI and VCCLO (Figure 14, time point 1).

DISABLE is immediately pulled high, so the data bus

switch is disabled. At the same time CON1 and CON2 make

contact and are shorted to ground on the host side (time

point 3). Since most boards need to be rocked back and

forth to get them in place, there is a period of time when

only one side of the connector is making contact. CON1

and CON2 should be located at opposite ends of the

connector.

Figure 14. Board Insertion Timing

can usually be prevented by using logic that does not

include the clamping diodes such as the QSI 74FCTT

family from Quality Semiconductor, or by using a data bus

switch such as the 10-bit QS3384 QuickSwitch also from

Quality Semiconductor (Tel: 408-450-8000). The

QuickSwitch bus switch contains an N-channel placed in

series with the data bus. The switch is turned off when the

board is inserted and then enabled after the power is

stable. The switch inputs and outputs do not have a

parasitic diode back to VCC and have very low capacitance.

The LTC1421 is designed to work directly with the

QuickSwitch bus switch as shown in Figure 13.

The DISABLE signal is connected to the enable pins of the

QS3384, and each switch is placed in series with a data

bus signal. When the board is inserted, the DISABLE

VCCLO

VCCHI

DISABLE

CON1

CON2

CPON

GATEHI

PWRGD

VTH1

1421 F14

VOUTHI

VOUTLO

GATELO

RESET

FAULT

POR

200ms

20ms

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