5

LTC1433/LTC1434

SSW (Pin 1/Pin 2): Drain of the Small P-Channel MOSFET

Switch.

BSW (Pin 3/Pin 4): Drain of the Large P-Channel MOSFET

Switch.

SGND (Pin 5): Small-Signal Ground. Must be routed

RUN/SS (Pin 6/Pin 7): Combination of Soft Start and Run

Control Inputs. A capacitor to ground at this pin sets the

ramp time to full current output. The time is approxi-

mately 0.5s/

µF. Forcing this pin below 1.3V causes all

circuitry to be shut down except the low-battery com-

parator. For input voltages above 6V this pin is clamped by

a 6V Zener (see Functional Diagram). Applying voltages

greater than 6V to this pin will cause additional current to

flow into this pin.

LBO (Pin 7/Pin 9): Open-Drain Output of an N-Channel

Pull-Down. This pin will sink current when LBI goes below

1.19V.

LBI (Pin 8/Pin 10): The (+) Input of the Low-Battery

Voltage Comparator. The (–) input is connected to the

1.19V reference. When LBI is grounded along with RUN/

SS, this comparator will shut down along with the rest of

the control circuitry. LBO will go to high impedance.

the output voltage to be set by an external resistive divider.

resistive divider.

voltage either from the output or from an external resistive

The current comparator threshold increases with this

control voltage. Nominal voltage range for this pin is 0V

to 2.4V.

POR (Pin 12/Pin 14): Open-Drain Output of an N-Chan-

nel Pull-Down. This pin sinks current when the output

voltage is 7.5% out of regulation. When the output rises

to – 5% of its regulated value, the pin goes into high

output is asserted when the device is in shutdown,

tween this pin and ground to set the operating frequency.

PLL LPF (Pin 16 LTC1434): Output of the Phase Detector

and Control Input of the Oscillator. Normally a series RC

lowpass network is connected from this pin to ground. Tie

this pin to SGND in applications which do not use the

phase-locked loop. Can be driven by a 0V to 2.4V logic

signal for a frequency shifting option.

PLLIN (Pin 17 LTC1434): External Synchronizing Input to

the Phase Detector. This pin is internally terminated to

SGND with 50k

Ω. Tie this pin to SGND in applications

which do not use the phase-locked loop.

Circuitry.

PGND (Pin 15/Pin 19): Switch Driver Ground. Connects to

be connected close to this pin.

MOSFETs and Switch Drivers. Must decouple this pin

properly to ground.

NC (Pins 2, 4,/Pins 1, 3, 6, 8): No Connection.

(LTC1433/LTC1434)