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LTC1473IGN 数据表(PDF) 7 Page - Linear Technology |
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LTC1473IGN 数据表(HTML) 7 Page - Linear Technology |
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7 / 16 page ![]() 7 LTC1473 The LTC1473 is responsible for low-loss switching and isolation at the “front end” of the power management system, where up to two battery packs can be connected and disconnected seamlessly. Smooth switching between input power sources is accomplished with the help of lowloss N-channel switches. They are driven by special gate drive circuitry which limits the inrush current in and out of the battery packs and the system power supply capacitors. All N-Channel Switching The LTC1473 drives external back-to-back N-channel MOSFET switches to direct power from two sources: the primary battery and the secondary battery or a battery and a wall unit. (N-channel MOSFET switches are more cost effective and provide lower voltage drops than their P- channel counterparts.) Gate Drive (VGG) Power Supply The gate drive for the low-loss N-channel switches is supplied by an internal micropower boost regulator which is regulated at approximately 8.5V above V+, up to 37V maximum. In two battery systems, the LTC1473 V+ pin is diode ORed through three external diodes connected to the three main power sources, DCIN, BAT1 and BAT2. Thus, VGG is regulated at 8.5V above the highest power source and will provide the overdrive required to fully enhance the MOSFET switches. For maximum efficiency the top of the boost regulator inductor is connected to V+ as shown in Figure 1. C1 provides filtering at the top of the 1mH switched inductor, L1, which is housed in a small surface mount package. An internal diode directs the current from the 1mH inductor to the VGG output capacitor C2. Inrush and Short-Circuit Current Limiting The LTC1473 uses an adaptive inrush current limiting scheme to reduce current flowing in and out of the two main power sources and the following system’s input capacitor during switch-over transitions. The voltage across a single small valued resistor, RSENSE, is measured to ascertain the instantaneous current flowing through the Figure 2. SW A1/B1 Inrush Current Limiting VSENSE+ VSENSE– GA1 GB1 SAB1 SW A1 SW B1 RSENSE 1473 F02 BAT1 + OUTPUT LOAD COUT VGG LTC1473 6V 6V ± 200mV THRESHOLD SW A/B GATE DRIVERS BIDIRECTIONAL INRUSH CURRENT SENSING AND LIMITING BAT1 BAT2 DCIN V+ SW GND 1473 F01 VGG L1 1mH C1 1 µF 50V TO GATE DRIVERS (8.5V + V+) LTC1473 C2 1 µF 50V VGG SWITCHING REGULATOR Figure 1. VGG Switching Regulator two switch pairs, SW A1/B1 and SW A2/B2, during the transitions. Figure 2 shows a block diagram of a switch driver pair, SW A1/B1. A bidirectional current sensing and limiting circuit determines when the voltage drop across RSENSE reaches ±200mV. The gate-to-source voltage, VGS, of the appro- priate switch is limited during the transition period until the inrush current subsides, generally within a few milli- seconds, depending upon the value of the following system’s input capacitor. This scheme allows capacitors and MOSFET switches of differing sizes and current ratings to be used in the same system without circuit modifications. OPERATION |
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