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LTC1550IGN 数据表(PDF) 7 Page - Linear Technology

部件名 LTC1550IGN
功能描述  Low Noise, Switched Capacitor Regulated Voltage Inverters
PDF  12 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1550IGN 数据表(HTML) 7 Page - Linear Technology

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LTC1550/LTC1551
except that the Shutdown pin is active-high (SHDN). All
members of the LTC1550 family feature a 900kHz charge
pump frequency. The LTC1550/ LTC1551 come standard
with fixed – 4.1V output voltages and the LTC1550 is
available with an adjustable output voltage. Both devices
can be configured with other fixed output voltages; contact
Linear Technology for more information.
The LTC1550 consists of two major blocks (see Block
Diagram): an inverting charge pump and a negative linear
regulator. The charge pump uses two external capacitors,
C1 and CCP to generate a negative voltage at CPOUT. It
operates by charging and discharging C1 on alternate
phases of the internal 900kHz clock. C1 is initially charged
to VCC through switches S1 and S3. When the internal
clock changes phase, S1 and S3 open and S2 and S4 close,
shorting the positive side of C1 to ground. This forces the
negative side of C1 below ground, and charge is transferred
to CCP through S4. As this cycle repeats, the magnitude of
the negative voltage approaches VCC. The 900kHz internal
clock frequency helps keep noise out of 400kHz to 600kHz
IF bands commonly used by portable radio frequency
systems and reduces the size of the external capacitors
required. Most applications can use standard 0.1
µFceramic
capacitors for C1 and CCP. Increasing C1 and CCP beyond
0.1
µF has little effect on the output ripple or the output
current capacity of the LTC1550/LTC1551.
The negative voltage at CPOUT supplies the input to the
negative regulator block. This block consists of an
N-channel MOSFET pass device and a feedback amplifier
that monitors the output voltage and compares it to the
internal reference. The regulated output appears at the
VOUT pin. The regulation loop is optimized for fast tran-
sient response, enabling it to remove most of the switch-
ing artifacts present at the CPOUT pin. Output ripple is
typically below 1mVP-P with output loads between 0mA
and 10mA. The output voltage is set to – 4.1V by a pair of
internal divider resistors. The N-channel pass device mini-
mizes dropout, allowing the output to remain in regulation
with supply voltages as low as 4.5V. An output capacitor
of at least 4.7
µF from VOUT to ground is required to keep
the regulator loop stable; for optimum stability and mini-
mum output ripple, at least 10
µF is recommended.
APPLICATIONS INFORMATION
6, 7
10
PGND, AGND
LTC1550
VOUT, SENSE
4, 11
ADJ
R1
R2
VOUT = –1.24V
R1 + R2
R2
()
LTC1550/51 • F02
Figure 1. External Resistor Connections
Adjustable Hook-Up
The LTC1550CGN is available in an adjustable output
version in a 16-pin SSOP package. The output voltage is
set with a resistor divider from GND to SENSE/VOUT
(Figure 1). Note that the internal reference and the internal
feedback amplifier are set up as a positive-output regula-
tor referenced to the SENSE pin, not a negative regulator
referenced to ground. The output resistor divider must be
set to provide a 1.24V at the ADJ pin with respect to VOUT.
For example, a – 3V output would require a 13k resistor
from GND to ADJ, and a 9.1k resistor to SENSE/VOUT. If,
after connecting the divider resistors, the output voltage is
not what you expected, try swapping them.
CAPACITOR SELECTION
The LTC1550/LTC1551 requires four external capacitors:
an input bypass capacitor, two 0.1
µF charge pump capaci-
tors and an output filter capacitor. The overall behavior of
the LTC1550/LTC1551 is strongly affected by the capaci-
tors used. In particular, the output capacitor has a signifi-
cant effect on the output ripple and noise performance.
Proper capacitor selection is critical for optimum perfor-
mance of the LTC1550/LTC1551.
Output Ripple vs Output Capacitor
Figure 3 shows the effect of using different output capaci-
tor values on LTC1550/LTC1551 output ripple. These
curves are taken using the circuit in Figure 2, with
CIN = 4.7µF and ILOAD = 5mA. The upper curve shows the
performance with a standard tantalum capacitor alone and
the lower curve shows the tantalum capacitor in parallel
with a 0.1
µF ceramic capacitor. As a general rule, larger



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