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LTC1605ACSW 数据表(PDF) 4 Page - Linear Technology |
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LTC1605ACSW 数据表(HTML) 4 Page - Linear Technology |
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4 / 16 page ![]() 4 LTC1605 DIGITAL INPUTS AND DIGITAL OUTPUTS (Note 5) LTC1605/LTC1605A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IOZ Hi-Z Output Leakage D15 to D0 VOUT = 0V to VDD, CS High q ±10 µA COZ Hi-Z Output Capacitance D15 to D0 CS High (Note 9) q 15 pF ISOURCE Output Source Current VOUT = 0V –10 mA ISINK Output Sink Current VOUT = VDD 10 mA (Note 5) LTC1605/LTC1605A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fSAMPLE(MAX) Maximum Sampling Frequency q 100 kHz tCONV Conversion Time q 8 µs tACQ Acquisition Time q 2 µs t1 Convert Pulse Width (Note 11) q 40 ns t2 Data Valid Delay After R/C ↓ (Note 9) q 8 µs t3 BUSY Delay from R/C ↓ CL = 50pF q 65 ns t4 BUSY Low 8 µs t5 BUSY Delay After End of Conversion 220 ns t6 Aperture Delay 40 ns t7 Bus Relinquish Time q 10 35 83 ns t8 BUSY Delay After Data Valid q 50 200 ns t9 Previous Data Valid After R/C ↓ 7.4 µs t10 R/C to CS Setup Time (Notes 9, 10) 10 ns t11 Time Between Conversions 10 µs t12 Bus Access and Byte Delay (Notes 9, 10) 10 83 ns TIMING CHARACTERISTICS POWER REQUIREMENTS (Note 5) LTC1605/LTC1605A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V IDD Positive Supply Current q 11 16 mA PDIS Power Dissipation 55 80 mW The q indicates specifications which apply over the full operating temperature range; all other limits and typicals TA = 25°C. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All voltage values are with respect to ground with DGND, AGND1 and AGND2 wired together (unless otherwise noted). Note 3: When these pin voltages are taken below ground or above VANA = VDIG = VDD, they will be clamped by internal diodes. This product can handle input currents of greater than 100mA below ground or above VDD without latch-up. Note 4: When these pin voltages are taken below ground, they will be clamped by internal diodes. This product can handle input currents of 90mA below ground without latchup. These pins are not clamped to VDD. Note 5: VDD = 5V, fSAMPLE = 100kHz, tr = tf = 5ns unless otherwise specified. Note 6: Linearity, offset and full-scale specifications apply for a VIN input with respect to ground. Note 7: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual end points of the transfer curve. The deviation is measured from the center of the quantization band. Note 8: Bipolar offset is the offset voltage measured from – 0.5 LSB when the output code flickers between 0000 0000 0000 0000 and 1111 1111 1111 1111. Note 9: Guaranteed by design, not subject to test. Note 10: Recommended operating conditions. |
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