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RF5633 数据表(PDF) 4 Page - RF Micro Devices |
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RF5633 数据表(HTML) 4 Page - RF Micro Devices |
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4 / 11 page ![]() 4 of 11 RF5633 DS120213 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Package Drawing Pin Function Description 3 RFIN RF input. This pin is matched to 50 and in DC-blocked internally. 6 VREG1 First stage input bias voltage. This pin requires a regulated supply to maintain nominal bias current. 7 VREG2 Second stage input bias voltage. This pin requires a regulated supply to maintain nominal bias current. 9 VREG3 Third stage input bias voltage. This pin requires a regulated supply to maintain nominal bias current. 10 PDET Power detector provides an output voltage proportional to the RF level VCC3/RF OUT. 11 ACG AC ground requires capacitor to ground. 13-18 VCC3/RFOUT RF output and bias for third stage. Output is externally matched to 50 and needs a DC-block. 19 VC2 Second stage supply voltage. 21 VC1 First stage supply voltage. 22 VBIAS Supply voltage for the bias reference and control circuits. May be connected with VCC1, VCC2, VCC3 as long as appropriate isolation is provided. 1, 2, 4, 5, 8, 12, 20, 23, 24 N/C No internal connection. May be connected to ground. Pkg Base GND Ground connection. The back side of the package should be connected to the ground plane through as short a connection as possible, e.g., PCB vias under the device. |
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