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RFFC2071ASB 数据表(PDF) 9 Page - RF Micro Devices |
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RFFC2071ASB 数据表(HTML) 9 Page - RF Micro Devices |
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9 / 22 page ![]() 9 of 22 RFFC2071A/2A DS140110 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or customerservice@rfmd.com. Hardware Control Three hardware control pins are provided: ENBL, MODE, and RESETB. The ENBL pin has two functions: to enable the analog circuits in the chip and to trigger the VCO auto-selection and coarse tun- ing mechanisms. The VCO auto-selection and coarse tuning is initiated when the ENBL pin is taken high. Every time the fre- quency of the synthesizer is reprogrammed, ENBL has to be asserted high to initiate these mechanisms and then to initiate the PLL locking. Alternatively following the programming of a new frequency the PLL re-lock self clearing bit could be used. The RESETB pin is a hardware reset control that will reset all digital circuits to their startup state when asserted low. The device includes a power-on-reset function, so this pin should not normally be required, in which case it should be connected to the positive supply. The MODE pin controls which mixer(s) and PLL programming register bank is active. Serial Data Interface Control The normal mode of operation uses the 3-wire serial data interface to program the device registers, and three extra hardware control lines: MODE, ENBL and RESETB. When the device is under software control, achieved by setting the SIPIN bit in the SDI_CTRL register high, then the hardware can be controlled via the SDI_CTRL register. When this is the case, the three hardware control lines are not required. If the device is under software control, pins 1 and 9 can be configured as general purpose outputs (GPO). Multi-Slice Mode The Multi-Slice mode of operation allows up to four chips to be controlled from a common serial bus. The device address pins (15 and 16) ADD1 and ADD2 are used to set the address of each part. On power up, and after a reset, the devices ignore the address pins ADD1 and ADD2 and any data presented to the serial bus will be programmed into all the devices. However, once the ADDR bit in the SDI_CTRL register is set, each device then adopts an address according to the state of the address pins on the device. General Purpose Outputs The general purpose outputs (GPOs) can be controlled via the GPO register and will depend on the state of MODE since they can be set in different states corresponding to either mixer path 1 or 2. For example, the GPOs can be used to drive LEDs or to control external circuitry such as switches or low power LNAs. Each GPO pin can supply approximately 20mA load current. The output voltage of the GPO high state will drop with increased current drive by approximately 25mV/mA. Similarly the output voltage of the GPO low state will rise with increased current, again by approximately 25mV/mA. Slice2 (0) Slice2 (1) Slice2 (2) Slice2 (3) A1 A2 ENX SDATA SCLK Vdd Vdd Vdd Vdd A1 A2 A1 A2 A1 A2 |
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