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LP28012 数据表(PDF) 9 Page - Lowpower Semiconductor inc |
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LP28012 数据表(HTML) 9 Page - Lowpower Semiconductor inc |
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9 / 10 page ![]() Preliminary Datasheet LP28012 LP28012 – 00 Feb.-2014 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 9 of 10 PCB Layout Considerations It is important to pay special attention to the PCB layout. The following provides some guidelines: • To obtain optimal performance, the decoupling capacitor from VCC to V(IN) and the output filter capacitors from OUT to VSS should be placed as close as possible to the bq24080, with short trace runs to both signal and VSS pins. The VSS pin should have short trace runs to the GND pin. • All low-current VSS connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small-signal ground path and the power ground path. • The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. • The LP28012 is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment |
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