±15kV ESD-Protected, 3.3V Quad

RS-422 Transmitters

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7

Test Circuits and Timing Diagrams

DI_

DO_+

DO_-

Figure 2. Differential Driver Propagation Delay and Transition

Time Test Circuit

DI_+

DI_-

2

2

Figure 1. Differential Driver DC Test Circuit

OUTPUT

UNDER TEST

S1

S2

ENABLE SIGNAL IS ONE OF THE POSSIBLE

ENABLE CONFIGURATIONS (SEE TRUTH TABLE).

Figure 4. Driver Enable/Disable Delays Test Circuit

DI

3V

0V

DO_-

DO_+

0V

1.5V

1.5V

10%

90%

90%

10%

Figure 3. Differential Driver Propagation Delay and Transition

Waveform

OUTPUT NORMALLY LOW

OUTPUT NORMALLY HIGH

3V

0V

0V

1.5V

1.5V

1.5V

1.5V

EN

ENABLE SIGNAL IS ONE OF THE POSSIBLE

ENABLE CONFIGURATIONS (SEE TRUTH TABLE).

Figure 5. Driver Enable/Disable Waveform

DI

GND

A

A

DO_-

DO_+

Figure 6. Short-Circuit Measurements