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IRDM982 数据表(PDF) 14 Page - International Rectifier

部件名 IRDM982
功能描述  Dynamic overcurrent limit per temperature
PDF  27 Pages
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制造商  IRF [International Rectifier]
网页  http://www.irf.com
标志 IRF - International Rectifier

IRDM982 数据表(HTML) 14 Page - International Rectifier

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IRDM982 Series
14 www.irf.com
© 2015 International Rectifier
April 8, 2015
Dynamic Electrical Characteristics
VCC= VB = 15 V, VS = VSS = COM, TA = 25°C, and CL = 1000 pF unless otherwise specified.
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
ICSC
Short Circuit Drain Current
1)
-
3
-
A
IRDM982-025MB, TJ=25°C,
tSC<20µs
V
+= 320V, V
CC=15V
-
5
-
IRDM982-035MB, TJ=25°C,
tSC<20µs
V
+= 320V, V
CC=15V
SCSOA
Short Circuit duration period
1)
20000
-
-
ns
V
+= 300V(IRDM982-025MB,-
35MB), VCC=+15V to 0V, line
to line short
tRR
Reverse recovery time
1)
-
80
-
ns
ID=1A, di/dt=100A/us
tILIM
ILIM to PWM current limit propagation delay
-
3000
-
ns
CLOAD = 1nF, FCLKIN =32.768kHz
tILIMFIL
ILIM filter time
1)
500
1000
1700
ns
VILIM=2V, Ta=25C
400
800
1400
VILIM=2V, Ta=125C
600
1200
2000
VILIM=2V, Ta=-40C
tHFILA
Hall differential input analog filter
1)
-
1500
-
tHFILD
Hall input digital filter delay
1)
-
2500
-
FCLKIN =32.768kHz
tHALLSAT
HALL input response time from saturation
1)
-
5000
-
tHALLPG
HALL input to PG output propagation delay
-
5000
-
FCLKIN =32.768kHz
tVSPACT
VSP standby to PWM active time
14.0
17.5
22.0
ms
CVDD=2.2uF, VSP=0
5.4V,
FCLKIN =32.768kHz
TVSPONDELAY
VSP active to PWM duty active
2.0
3.5
5.0
VSP from 1.8V to 2.6V,
FCLKIN =32.768kHz
tVDDHOLD
VDD hold time at standby
1)
4.9
5.0
5.1
S
CVDD=2.2uF, VSP=2
0V,
FCLKIN =32.768kHz
tRLOCKDETECT
Rotor Lock detect time
1)
4.9
5
5.1
VSP>2.1V, |Elec freq|<3Hz,
FCLKIN =32.768kHz
DT
Deadtime
-
1000
-
FCLKIN =32.768kHz
PWHIN
Internal high side minimum pulse width
-
400
-
ns
Not a final output of a part ,
FCLKIN =32.768kHz
PWLIN
Internal low side minimum pulse width
-
100
-
Not a final output of a part ,
FCLKIN =32.768kHz
SPDOVER
Over speed
1)
-
200
-
Hz
FCLKIN =32.768kHz
SPDPWMCHG
Block commutation to sine PWM change
speed
1)
-
3
-
1 consecutive electrical angle
update period, FCLKIN
=32.768kHz
SPDEFF1
EFF bending point 1 speed
1)
-
33.33
-
FCLKIN =32.768kHz
SPDEFF2
EFF bending point 2 speed
1)
-
83.33
-
FCLKIN =32.768kHz
1) Guaranteed by design, not tested at manufacturing



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