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9DBU0741 数据表(PDF) 2 Page - Integrated Circuit Systems |
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9DBU0741 数据表(HTML) 2 Page - Integrated Circuit Systems |
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2 / 17 page ![]() 7 O/P 1.5V PCIE GEN1-2-3 FAN-OUT BUFFER W/ZO=100OHMS 2 REVISION C 04/22/15 9DBU0741 DATASHEET Pin Configuration SMBus Address Selection Table Power Management Table Power Connections 40 39 38 37 36 35 34 33 32 31 vSADR_tri 130 NC vOE6# 229 vOE3# DIF6 328 DIF3# DIF6# 427 DIF3 VDDR1.5 526 VDDIO CLK_IN 625 VDDA1.5 CLK_IN# 724 vOE2# GNDDIG 823 DIF2# SCLK_3.3 922 DIF2 SDATA_3.3 10 21 vOE1# 11 12 13 14 15 16 17 18 19 20 40-VFQFPN ^ prefix indicates internal Pull-Up Resistor v prefix indicates Internal Pull-Dow n Resistor 5mm x 5mm 0.4mm pin pitch 9DBU0741 epad is GND SADR Address 0 1101011 M 1101100 1 1101101 x State of SADR on first application of CKPWRGD_PD# + Read/Write bit x x True O/P Comp. O/P 0X X X Low Low 1 Running 0 X Low Low 1 Running 1 0 Running Running 1 Running 1 1 Low Low CLK_IN DIFx OEx# Pin CKPWRGD_PD# SMBus OEx bit Pin Number VDD VDDIO GND 541 Input receiver analog 11 8 Digital Power 16,25,31 12,17,26,32, 39 41 DIF outputs, Logic Description |
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