__________Applications Information

Overvoltage Protection

Proper power-supply sequencing is recommended for

all CMOS devices. Do not exceed the absolute maxi-

mum ratings, because stresses beyond the listed rat-

ings may cause permanent damage to the devices.

Always sequence V+ on first, followed by the logic

inputs. If power-supply sequencing is not possible, add

two small signal diodes in series with supply pins for

overvoltage protection (Figure 1). Adding diodes

reduces the analog signal range to 1V below V+ and

1V above GND, but low switch resistance and low leak-

age characteristics are unaffected. Device operation is

unchanged, and the difference between V+ and GND

should not exceed 17V.

Low-Cost, Low-Voltage, Quad, SPST,

CMOS Analog Switches

_______________________________________________________________________________________

7

______________________________________________________________Pin Description

Ground

8

7

Positive Supply Voltage

16

14

Logic Control Inputs

15, 6, 7, 14

13, 5, 6, 12

Not internally connected

3, 11

—

Analog Switch Common Terminal (bidirectional)

2, 5, 10, 12

2, 4, 9, 10

Analog Switch Normally Open Terminal (bidirectional)

1, 4, 9, 13

1, 3, 8, 11

GND

V+

IN1–IN4

N.C.

COM1–COM4

NO1–NO4

PIN

FUNCTION

DIP/SO

QSOP

NAME

POSITIVE SUPPLY

COM

NO

Vg

V+

MAX4066

MAX4066A

Figure 1. Overvoltage Protection Using Two External Blocking

Diodes