ICS83940DYI REVISION C MARCH 20, 2013

7

©2013 Integrated Device Technology, Inc.

ICS83940DI Data Sheet

LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE: All parameters measured at 200MHz unless noted otherwise.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature and with equal load

NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 6: Defined as skew between outputs on different devices, across temperature and voltage ranges, and with equal load conditions. Using

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Output Frequency

250

MHz

Propagation

Delay

PCLK, nPCLK; NOTE 1, 5

ƒ

 150MHz

1.7

3.2

ns

LVCMOS_CLK; NOTE 2, 5

ƒ

 150MHz

1.7

3.0

ns

Propagation

Delay

PCLK, nPCLK; NOTE 1, 5

ƒ > 150MHz

1.6

3.4

ns

LVCMOS_CLK; NOTE 2, 5

ƒ > 150MHz

1.8

3.3

ns

tsk(o)

Output Skew;

NOTE 3, 5

PCLK, nPCLK

Measured on the Rising Edge

150

ps

LVCMOS_CLK

150

ps

tsk(pp)

Part-to-Part Skew;

NOTE 6

PCLK, nPCLK

ƒ

 150MHz

1.5

ns

LVCMOS_CLK

ƒ

 150MHz

1.3

ns

Part-to-Part Skew;

NOTE 6

PCLK, nPCLK

ƒ > 150MHz

1.8

ns

LVCMOS_CLK

ƒ > 150MHz

1.5

ns

Part-to-Part Skew;

NOTE 4, 5

PCLK, nPCLK

Measured on the Rising Edge

850

ps

LVCMOS_CLK

750

ps

Output Rise/Fall Time

0.5V to 1.8V

0.3

1.2

ns

odc

Output Duty Cycle

ƒ < 134MHz

45

50

55

%