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ICS831742I 数据表(PDF) 1 Page - Integrated Device Technology

部件名 ICS831742I
功能描述  Maximum input/output clock frequency
PDF  18 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

ICS831742I 数据表(HTML) 1 Page - Integrated Device Technology

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DATA SHEET
ICS831742AGI JULY 10, 2012
1
©2012 Integrated Device Technology, Inc.
4:2 Differential Clock/Data
Multiplexer
ICS831742I
General Description
The ICS831742I is a high-performance, differential HCSL clock/data
multiplexer and fanout buffer. The device is designed for the
multiplexing and fanout of high-frequency clock and data signals. The
device has four differential, selectable clock/data inputs. The selected
input signal is distributed to two low-skew differential HCSL outputs.
Each input pair accepts HCSL, LVDS and LVPECL levels. The
ICS831742I is characterized to operate from a 3.3V power supply.
Guaranteed input, output-to-output and part-to-part skew
characteristics make the ICS831742I ideal for those clock and data
distribution applications demanding well-defined performance and
repeatability. The ICS831742I supports the clock multiplexing and
distribution of PCI Express (2.5 Gb/s), Gen 2 (5 Gb/s) and
Gen 3 (8 Gb/s) clock signals.
Features
4:2 differential clock/data multiplexer with fanout
Four selectable, differential input pairs
Each differential input pair can accept the following levels: HCSL,
LVDS and LVPECL
Two differential HCSL output pairs
Maximum input/output clock frequency: 700MHz
Maximum input/output data rate: 1400Mb/s (NRZ)
LVCMOS interface levels for all control inputs
PCI Express (2.5Gb/s), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) clock
jitter compliant
Input skew: 110ps max
Part-to-part skew: 225ps max
Full 3.3V supply voltage
Available in lead-free (RoHS 6)
-40°C to 85°C ambient operating temperature
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
CLK0
nCLK0
VDD
CLK1
nCLK1
CLK2
nCLK2
GND
CLK3
nCLK3
VDD
SEL1
IREF
VDD
SEL0
QB
nQB
nQA
QA
VDD
GND
nOEB
nOEA
Block Diagram
QA
nQA
QB
nQB
IREF
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
SEL1
SEL0
nOEA
nOEB
Pullup/down
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Pullup/down
Pulldown
Pullup/down
Pulldown
Pullup/down
Pulldown
0 0
0 1
1 0
1 1
Pin Assignment
ICS831742AGI
24-Lead TSSOP
4.4mm x 7.8mm x 0.925mm package body
G Package
Top View


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