S-25C080A H Series

Seiko Instruments Inc.

16

5. Write in the status register (WRSR)

The values of status register (SRWD, BP1, BP0) can be rewritten by inputting the WRSR instruction. But b6, b5, b4, b1,

b0 of status register cannot be rewritten. b6 to b4 are always “0” when reading the status register.

Before inputting the WRSR instruction, set bit WEL by the WREN instruction. The operation of WRSR is shown below.

Set the chip select ( CS ) “L” first. After that, input the instruction code and data from serial data input (SI). To start

It is possible to confirm the operation status by reading the value of bit WIP during WRSR Write. Bit WIP is “1” during

Write, “0” during any other status. Bit WEL is reset when Write is completed.

With the WRSR instruction, the values of BP1 and BP0; which determine the area size the users can handle as the

Read Only memory; can be changed. Besides bit SRWD can be set or reset by the WRSR instruction depending on

the status of Write protect WP . With a combination of bit SRWD and Write protect WP , the device can be set in

Hardware Protect mode (HPM). In this case, the WRSR instruction is not be performed (Refer to “ Protect

Operation”).

Bit SRWD and BP1, BP0 keep the value which is the one prior to the WRSR instruction during the WRSR instruction.

The newly updated value is changed when the WRSR instruction has completed.

To cancel the WRSR instruction, input the clock different from a specified value (n = 16 clock) while CS is in “L”.

SO

SCK

WP

CS

SI

Instruction

High-Z

12345678

High / Low

9

10

11

1213141516

Inputs Data in the Status Register

b7

b6

b5

b0

b1

b2

b3

b4

Figure 14 WRSR Operation