US2005

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

2 of 5

www.unisonic.com.tw

QW-R502-A04.a

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PIN CONFIGURATION

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PIN DESCRIPTION

PIN NO.

PIN NAME

DESCRIPTION

1

IN

Supply input. This pin provides power to both the output switch and the UTC US2005’s

internal control circuitry.

2

GND

Ground.

3

EN

Switch Enable (Input): Active-high (-1) or active-low (-2)

4

FLG

Fault status. A logic LOW on this pin indicates the UTC US2005 is in current limiting, or

has been shut down by the thermal protection circuit. This is an ‘Open Drain’ output

allowing logical OR’ ing of multiple UTC US2005s.

5

CSLEW

Slew rate control. Adding a small value capacitor between this pin and VIN slows

turn-ON of the power FET.

6

OUT

Switch output. The load being driven by UTC US2005 is connected to this pin.

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BLOCK DIAGRAM

CSLEW

EN

Slew Rate

Control

Bias

Thermal

Protection

Oscillator

Charge

Pump

UVLO

Gate

Control

Current

Limiting

Output

Voltage

Detection

Delay

IN

OUT

FLG

GND