DRV8701 datasheet(24/42 Pages) TI

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DRV8701

SLVSCX5B – MARCH 2015 – REVISED JULY 2015

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7.3.13 Protection Circuits

The DRV8701 is fully protected against VM undervoltage, charge pump undervoltage, overcurrent, gate driver

shorts, and overtemperature events.

7.3.13.1 VM Undervoltage Lockout (UVLO)

If at any time the voltage on the VM pin falls below the UVLO threshold voltage, all FETs in the H-bridge are

disabled, the charge pump is disabled, AVDD is disabled, and the nFAULT pin is driven low. Operation resumes

when VM rises above the UVLO threshold. The nFAULT pin is released after operation has resumed.

7.3.13.2 VCP Undervoltage Lockout (CPUV)

If at any time the voltage on the VCP pin falls below the charge pump undervoltage threshold voltage (VCPUV), all

FETs in the H-bridge are disabled and the nFAULT pin is driven low. Operation resumes when VCP rises above

the CPUV threshold. The nFAULT pin is released after operation has resumed.

7.3.13.3 Overcurrent Protection (OCP)

Overcurrent is sensed by monitoring the VDS voltage drop across the external FETs (see Figure 28). If the

voltage across a driven FET exceeds the overcurrent trip threshold (VDS OCP) for longer than the OCP deglitch

time (tOCP), an OCP event is recognized. As a result, all FETs in the H-bridge are disabled and the nFAULT pin is

driven low; the driver is re-enabled after the OCP retry period (tRETRY) has passed. nFAULT releases high-Z

again at after the retry time. If the fault condition is still present, the cycle repeats. If the fault is no longer present,

normal operation resumes and nFAULT remains released high-Z.

This VDS overcurrent monitor on the high-side FETs can be disabled by using a specific IDRIVE setting. This

allows the system to have a higher DRV8701 VM supply than the H-bridge supply.

In addition to this FET VDS monitor, an overcurrent condition is also detected if the voltage at SP exceeds

VSP OCP.

7.3.13.4 Pre-Driver Fault (PDF)

The GHx and GLx pins are monitored such that if the voltage on the external FET gate does not increase above

1 V (when sourcing current) or decrease below 1 V (when sinking current) after tDRIVE, a pre-driver fault is

detected. The device encounters this fault if GHx or GLx are shorted to GND, SHx, or VM. Additionally, the

device encounters the pre-driver fault if the IDRIVE setting selected is not sufficient to turn on the external FET.

As a result, all FETs in the H-bridge are disabled and the nFAULT pin is driven low. The driver is re-enabled after

the retry period (tRETRY) has passed. The nFAULT pin is released after operation has resumed.

7.3.13.5 Thermal Shutdown (TSD)

If the die temperature exceeds TTSD, all FETs in the H-bridge are disabled, the charge pump is shut down, AVDD

is disabled, and the nFAULT pin is driven low. After the die temperature has fallen below TTSD – THYS, operation

automatically resumes. The nFAULT pin is released after operation has resumed.

Table 7. Fault Response

Fault

Condition

H-Bridge

Charge Pump

AVDD

DVDD

Recovery

VM undervoltage

≤ VUVLO

Disabled

Operating

≥ VUVLO

(UVLO)

VCP undervoltage

VCP < VCPUV

Disabled

Operating

VCP > VCPUV

(CPUV)

External FET overload

VDS ≥ 1.0 V or

Disabled

Operating

tRETRY

(OCP)

VSP – VSN > 1.0 V

Gate voltage

Pre-driver fault (PDF)

Disabled

Operating

tRETRY

unchanged after tDRIVE

Thermal shutdown

TJ ≥ 150°C

Disabled

Operating

TJ ≤ 130°C

(TSD)

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