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MAX902CSD 数据表(PDF) 3 Page - Maxim Integrated Products

部件名 MAX902CSD
功能描述  High-Speed, Low-Power Voltage Comparators
PDF  12 Pages
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制造商  MAXIM [Maxim Integrated Products]
网页  https://www.maximintegrated.com/en.html
标志 MAXIM - Maxim Integrated Products

MAX902CSD 数据表(HTML) 3 Page - Maxim Integrated Products

  MAX902CSD Datasheet HTML 1Page - Maxim Integrated Products MAX902CSD Datasheet HTML 2Page - Maxim Integrated Products MAX902CSD Datasheet HTML 3Page - Maxim Integrated Products MAX902CSD Datasheet HTML 4Page - Maxim Integrated Products MAX902CSD Datasheet HTML 5Page - Maxim Integrated Products MAX902CSD Datasheet HTML 6Page - Maxim Integrated Products MAX902CSD Datasheet HTML 7Page - Maxim Integrated Products MAX902CSD Datasheet HTML 8Page - Maxim Integrated Products MAX902CSD Datasheet HTML 9Page - Maxim Integrated Products Next Button
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High-Speed, Low-Power Voltage Comparators
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, VEE = -5V, VDD = +5V, LE1–LE4 = logic high, TA = +25°C, unless otherwise noted.)
MAX900A/MAX901A
MAX900B/MAX901B
MAX902
MAX903
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Positive Analog
Supply Current
ICC
(Note 7)
10
15
5
8
2.5
4
mA
Negative Analog
Supply Current
IEE
(Note 7)
7
12
3.5
6
2
3
mA
Digital Supply
Current
IDD
(Note 7)
4
6
2
3
1
1.5
mA
Power
Dissipation
PD
VCC = VDD =
+5V, VEE = 0
70
105
35
55
18
28
mW
TIMING CHARACTERISTICS
(VCC = +5V, VEE = -5V, VDD = +5V, LE1–LE4 = logic high, TA = +25°C, unless otherwise noted.)
MAX900A/MAX901A
MAX900B/MAX901B
MAX902
MAX903
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Input-to-Output High
Response Time
tpd+
VOD = 5mV,
CL = 15pF,
IO = 2mA
(Note 4)
810
8
10
8
10
ns
Input-to-Output Low
Response Time
tpd-
VOD = 5mV,
CL = 15pF,
IO = 2mA
(Note 4)
810
8
10
8
10
ns
Difference in
Response Time
Between Outputs
∆tpd
(Notes 4, 5)
0.5
2.0
0.5
2.0
0.5
2.0
ns
Latch Disable to
Output High Delay
tpd+ (D)
(Notes 3, 6)
10
10
10
ns
Latch Disable to
Output Low Delay
tpd- (D)
(Notes 3, 6)
12
12
12
ns
Minimum Setup Time
ts
(Notes 3, 6)
2
2
2
ns
Minimum Hold Time
th
(Notes 3, 6)
1
1
1
ns
Minimum Latch
Disable Pulse Width
tpw (D)
(Notes 3, 6)
10
10
10
ns



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