PA4894G-SM2-R datasheet(6/11 Pages) UTC

6 / 11 page

PA4894

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

6 of 11

www.unisonic.com.tw

QW-R502-379.A

APPLICATION INFORMATION

Detailed Description

The UTC PA4894 includes two power amplifiers internally. Two of them provide a controlled gain with external

components RIN and RF; the gain is calculated by the ratios of the resistors. The load is driven differentially through

OUTA and OUTB outputs. This configuration is saving the use of an output coupling capacitor.

The UTC PA4894 is operating on a 2.6V to 5.5V power supply, when VP is 2.6V it delivers 320mW rms output

power to 4.0Ω load, and when VP is 5.0V, it delivered 1.0W rms output power to 8.0Ω load.

Internal Power Amplifier

The internal power amplifier contains output PMOS and NMOS transistors, which is used to deliver the output

power of the specifications without clipping. The channel resistance (RON) of the NMOS and PMOS transistors does

not exceed 0.6Ω when they drive current.

The structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium

gain stages are transconductance gain stages to obtain maximum bandwidth and DC gain.

Turn-On and Turn-Off Transitions

Output power in the load established must be slowly or cut for minimize the click and pop noise during the

transitions between turn-on and turn-off conditions. When shutdown mode is over，, the bypass voltage begins to rise

exponentially and once the output DC level is around the common mode voltage, the turn-on mode is over.

The turn−on time is determined by the following equation (at 25°C):

TON = 0.95×R×CBYP

(CBYP: bypass capacitor R: internal 150 k resistor with a 25% accuracy)

The turned off operation is as the same as the turn-on operation. Through applying a same logic state on the SD

SELECT and SD MODE pins, the system enters this mode. During the shutdown mode, amplifier outputs are

connected to the ground to discharge.

Shutdown Function

When SD SELECT and SD MODE pins are in the same logic state, the system enters shutdown mode. This

brings flexibility to the design, as the SD MODE pin must be permanently connected to VP or GND on the PCB. In

many applications, the output of a microcontroller or microprocessor is connected to the SD SELECT pin, so it is not

better to allow this pin float. During the shutdown state, the DC quiescent current has a typical value of 10nA.

Current Limit Circuit

The current limit circuit protects the device from damage from excessive current. The maximum output power of

the circuit (PO(RMS) =1.0W, VP = 5.0V, RL = 8.0Ω) requires a peak current in the load of 500mA. When short-circuit

occurs between both outputs, the current limit in the load is fixed to 800mA for limiting the excessive power

consumption.

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