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EL7155CSZ 数据表(PDF) 2 Page - Intersil Corporation |
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EL7155CSZ 数据表(HTML) 2 Page - Intersil Corporation |
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2 / 10 page ![]() EL7155 2 FN7279.3 October 24, 2014 Submit Document Feedback Pin Configuration EL7155 (8 LD SOIC) TOP VIEW Pin Descriptions PIN # PIN NAME FUNCTION EQUIVALENT CIRCUIT 1VS+ Positive Supply Voltage 2OE Output Enable Circuit 1 3 IN Input Reference Circuit 1 4GND Ground 5 VL Negative Supply and Lower Output Voltage 6OUTL Lower Switch Output Circuit 2 7 OUTH Upper Switch Output Circuit 3 8 VH Upper Output Voltage 1 2 3 4 8 7 6 5 L O G I C VS+ OE IN GND VH OUTH OUTL VL VS+ INPUT VL OUTL VL VS+ VH OUTH VL VS+ VL Ordering Information PART NUMBER (Notes 1, 2) PART MARKING PACKAGE (Pb-Free) PKG. DWG. # EL7155CSZ 7155CSZ 8 Ld SOIC M8.15E EL7155CSZ-T7 (Note 3) 7155CSZ 8 Ld SOIC M8.15E EL7155CSZ-T7A (Note 3) 7155CSZ 8 Ld SOIC M8.15E EL7155CSZ-T13 (Note 3) 7155CSZ 8 Ld SOIC M8.15E NOTE: 1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. For Moisture Sensitivity Level (MSL), please see product information page for EL7155. For more information on MSL, please see tech brief TB363. 3. Please refer to TB347 for details on reel specifications. |
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