© 1997 Microchip Technology Inc.

Preliminary

DS21223A-page 1

DEVICE SELECTION TABLE

FEATURES

• Low power CMOS technology

- Write current: 3 mA typical

- Read current: 500

µA typical

- Standby current: 500 nA typical

• 8192 x 8 bit organization

• 32 byte page

• Write cycle time: 5ms max.

• Self-timed ERASE and WRITE cycles

• Block write protection

- Protect none, 1/4, 1/2, or all of array

• Built-in write protection

- Power on/off data protection circuitry

- Write enable latch

- Write protect pin

• Sequential read

• High reliability

- Endurance: 1M cycles (guaranteed)

- Data retention: > 200 years

- ESD protection: > 4000 V

• 8-pin PDIP, SOIC, and TSSOP packages

• Temperature ranges supported:

DESCRIPTION

The Microchip Technology Inc. 25AA640/25LC640/

able PROM. The memory is accessed via a simple

Serial Peripheral Interface (SPI) compatible serial bus.

The bus signals required are a clock input (SCK) plus

separate data in (SI) and data out (SO) lines. Access to

the device is controlled through a chip select (CS) input.

Communication to the device can be paused via the

hold pin (HOLD). While the device is paused, transi-

tions on its inputs will be ignored, with the exception of

chip select, allowing the host to service higher priority

interrupts.

PACKAGE TYPES

BLOCK DIAGRAM

Part

Number

Range

Max Clock

Frequency

Temp

Ranges

25AA640

1.8-5.5V

1 MHz

C,I

25LC640

2.5-5.5V

2 MHz

C,I

25C640

4.5-5.5V

3 MHz

C,I,E

- Commercial: (C)

0

°C to +70°C

- Industrial: (I)

-40

°C to +85°C

- Automotive: (E) (25C640)

-40

°C to +125°C

TSSOP

1

2

3

4

8

7

6

5

SCK

SI

WP

HOLD

CS

SO

PDIP/SOIC

1

2

3

4

8

7

6

5

HOLD

SCK

SI

CS

SO

WP

SI

SO

SCK

CS

HOLD

WP

Status

Register

I/O Control

Memory

Control

Logic

X

Dec

HV Generator

EEPROM

Array

Page Latches

Y Decoder

Sense Amp.

R/W Control

Logic

*25xx640 is used in this document as a generic part number for the 25AA640/25LC640/25C640 devices.

SPI is a trademark of Motorola.