HCS361 datasheet(9/24 Pages) MICROCHIP

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HCS361

Preliminary

DS40146C-page 9

TABLE 3-7

FUNCTION CODES

3.5.12

VPWM: VARIABLE PULSE WIDTH

MODULATION

VPWM selects between VPWM modulation and PWM

modulation. If VPWM = 1, VPWM modulation is

selected as well as the following:

Enables the TXWAK bit to select the WAKEUP

transmission.

Extends the Guard Time.

If VPWM = 0, PWM modulation is selected.

3.5.13

OVR: OVERFLOW

The overﬂow bit is used to extend the number of possi-

ble

synchronization

values.

The

synchronization

counter is 16 bits in length, yielding 65,536 values

before the cycle repeats. Under typical use of

10 operations a day, this will provide nearly 18 years of

use before a repeated value will be used. Should the

system designer conclude that is not adequate, then

the overﬂow bit can be utilized to extend the number of

unique values. This can be done by programming OVR

to 1 at the time of production. The encoder will automat-

ically clear OVR the ﬁrst time that the transmitted syn-

chronization value wraps from 0xFFFF to 0x0000.

Once cleared, OVR cannot be set again, thereby creat-

ing a permanent record of the counter overﬂow. This

prevents fast cycling of 64K counter. If the decoder sys-

tem is programmed to track the overﬂow bits, then the

effective number of unique synchronization values can

be extended to 128K. If programmed to zero, the sys-

tem will be compatible with the NTQ104/5/6 devices

(i.e., no overﬂow with discrimination bits set to zero).

IND = 0

IND = 1

Comments

Counter

If SEED = 1, transmit seed after delay.

If SEED = 1, transmit seed immediately.

B IR mode

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