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TC1321 数据表(PDF) 9 Page - Microchip Technology |
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TC1321 数据表(HTML) 9 Page - Microchip Technology |
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9 / 16 page ![]() © 2002 Microchip Technology Inc. DS21387B-page 9 TC1321 FIGURE 4-1: TIMING DIAGRAMS tSU(START) tH(START) tSU-DATA tSU(STOP) tIDLE A = START Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave A SMBus Write Timing Diagram SMBus Read Timing Diagram B CD E F G H IJ K E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Master H = LSB of Data Clocked into Master ILOW IHIGH I = Acknowledge Clock Pulse J = STOP Condition K = New START Condition SCL SDA tSU(START) tH(START) tSU-DATA tH-DATA tSU(STOP) tIDLE A = START Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low A B CD E F G H I J KL M F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Slave H = LSB of Data Clocked into Slave I = Slave Pulls SDA Line Low J = Acknowledge Clocked into Master K = Acknowledge Clock Pulse L = STOP Condition, Data Executed by Slave M = New START Condition ILOW IHIGH SCL SDA |
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