TC170

DS21395B-page 6

© 2002 Microchip Technology Inc.

3.0

DETAILED DESCRIPTION

3.1

Peak Current Limit Setup

Resistors R1 and R2 at the current limit input (pin 1) set

the TC170 peak current limit (Figure 3-1). The potential

at pin 1 is easily calculated:

R1 should be selected first. The shutdown circuit

is latched for currents greater than 125

µA.

The error amplifier output voltage is clamped from

going above V1 through the limit buffer amplifier. Peak

current is sensed by RS and amplified by the current

amplifier which has a fixed gain of 3.15.

the PWM comparator noninverting input to exceed V1,

the

potential

at

the

inverting

input.

Once

the

comparator trip point is exceeded, both outputs are

disabled.

where:

3.15 = Gain of current-sense amplifier

0.75V = Current limit offset

Both driver outputs (pins 11 and 14) are OFF (LOW)

when the peak current limit is exceeded. When the

normally.

3.2

Output Shutdown

The TC170 outputs can be turned OFF quickly through

the shutdown input (pin 16). A signal greater than

350mV at pin 16 forces the shutdown comparator

output HIGH. The PWM latch is held set, disabling the

outputs.

positive feedback through the lockup amplifier and Q1

keeps the inverting PWM comparator inverting input

below 0.75V. Q3 remains ON even after the shutdown

input signal is removed, because of the positive

feedback. The state can be cleared only through a

power-up cycle. Outputs will be disabled whenever the

potential at pin 1 is below 0.75V.

The shutdown terminal gives a fast, direct way to

disable the TC170 output transistors. System protec-

tion and remote shutdown applications are possible.

The input pulse to pin 16 should be at least 500nsec

wide and have an amplitude of at least 1V in order to

get the minimum propagation delay from input to

output. If these parameters are met, the delay should

be less than 600nsec at 25°C; however, the delay time

will increase as the device temperature rises.

3.3

Soft Restart From Shutdown

A soft restart can be programmed if nonlatched

shutdown operation is used.

A capacitor at pin 1 will cause a gradual increase in

potential toward V1. When the voltage at pin 1 reaches

0.75V, the PWM latch set input is removed and the

circuit establishes a regulated output voltage. The soft-

start operation forces the PWM output drivers to initially

operate with minimum duty cycle and low peak

currents.

Even if a soft start is not required, it is necessary to

insert a capacitor between pin 1 and ground if the

prevent "noise triggering" of the latch, yet minimize the

soft-start effect.

3.4

Soft-Start Power-Up

During power-up, a capacitor at R1, R2 initiates a soft-

start cycle. As the input voltage (pin 15) exceeds the

undervoltage lockout potential (7.7V), Q4 is turned

OFF, ending undervoltage lockout. Whenever the

PWM comparator inverting input is below 0.5V, both

outputs are disabled.

When the undervoltage lockout level is passed, the

capacitor begins to charge. The PWM duty cycle

increases until the operating output voltage is reached.

Soft-start operation forces the PWM output drivers to

initially operate with minimum duty cycle and low peak

current.

3.5

Current-Sense Amplifier

The current-sense amplifier operates at a fixed gain

Resistive-sensing methods are shown in Figure 3-2

and Figure 3-3. In Figure 3-2, a simple RC filter limits

transient voltage spikes at pin 4, caused by external

output transistor-collector capacitance. Transformer

coupling (Figure 3-4) offers isolation and better power

efficiency, but cost and complexity increase.

In order to minimize the propagation delay from the

input to the current amplifier to the output terminals, the

current ramp should be in the order of 1

µsec in width

(min). Typical time delay values are in the 300 to

400nsec region at 25°C. The delay time increases with

device temperature so that at 50°C, the delay times

may be increased by as much as 100nsec.

R2

R1 + R2

V1–0.75V

3.15 (RS)

R2

R1 + R2