TC500 datasheet(2/28 Pages) MICROCHIP

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TC500/A/510/514

DS21428B-page 2

General Description

TheTC500/A/510/514 family are precision analog front

ends that implement dual slope A/D converters having

a maximum resolution of 17-bits plus sign. As a mini-

mum, each device contains the integrator, zero cross-

ing comparator and processor interface logic. The

TC500 is the base (16-bit max) device and requires

both positive and negative power supplies. The

TC500A is identical to the TC500 with the exception

that it has improved linearity, allowing it to operate to a

maximum resolution of 17-bits. The TC510 adds an on-

board negative power supply converter for single sup-

ply operation. The TC514 adds both a negative power

supply converter and a 4 input differential analog

multiplexer.

Each device has the same processor control interface

consisting of 3 wires: control inputs (A and B) and zero-

crossing comparator output (CMPTR). The processor

manipulates A, B to sequence the TC5XX through four

phases of conversion: Auto Zero, Integrate, De-inte-

grate and Integrator Zero. During the Auto Zero phase,

offset voltages in the TC5XX are corrected by a closed

loop feedback mechanism. The input voltage is applied

to the integrator during the Integrate phase. This

causes an integrator output dv/dt directly proportional

to the magnitude of the input voltage. The higher the

input voltage, the greater the magnitude of the voltage

stored on the integrator during this phase. At the start

of the De-integrate phase, an external voltage refer-

ence is applied to the integrator and, at the same time,

the external host processor starts its on-board timer.

The processor maintains this state until a transition

occurs on the CMPTR output, at which time the proces-

sor halts its timer. The resulting timer count is the con-

verted analog data. Integrator Zero (the final phase of

conversion) removes any residue remaining in the

integrator in preparation for the next conversion.

The TC500/A/510/514 offer high resolution (up to 17-

bits), superior 50Hz/60Hz noise rejection, low power

operation, minimum I/O connections, low input bias

currents and lower cost compared to other converter

technologies having similar conversion speeds.

Typical Application

Level

Shift

Control Logic

Analog

Switch

Control

Signals

ACOM

VREF+

BUF

CAZ

Buffer

Integrator

SWR

SWIZ

CMPTR 1

CMPTR 2

CMPTR

Output

DGND

Control Logic

SW1

TC500

TC500A

TC510

TC514

CREF

CREF+

SWR

CREF-

CAZ

RINT

CINT

SWRI- SWRI-

SWRI+ SWRI-

SWZ

SWI

SWZ

VSS

OSC

–

Phase

Decoding

Logic

Polarity

Detection

DC-TO-DC

Converter

(TC510 & TC514)

Zero Integrator Output

Auto-Zero

Signal Integrate

Deintegrate

VREF-

VOUT-

COUT-

1.0µF

VSS

SWI

DIF.

MUX

(TC514)

CH1+

CH2+

CH3+

CH4+

CH1-

CH2-

CH3-

CH4-

CAP- CAP+

(TC500

TC500A)

Converter Sate

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