ML2653CQ datasheet(20/23 Pages) MICRO-LINEAR

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ML2652/ML2653

outputs can be coupled to an external MAU with either

capacitors or a transformer. The ML2652 meets all AUI

transmitter specifications outlined in IEEE 802.3–1988

Section 7.

DI+ and DI– are inputs from the external MAU which

contain the receive data that goes to the manchester

decoder.

The DI+ and DI– inputs contain an AUI DI squelch circuit

which determines when incoming data on DI+ and DI– is

valid. The DI squelch is considered “on” when the data is

deemed to be invalid, and the DI squelch is considered

“off” when data is determined to be valid.

The input signal on DI+ and DI– must meet the following

criteria in order to turn receive squelch off and be

recognized as valid data:

1. The input signal must exceed the negative AUI DI

squelch on level.

2. The input signal must exceed the negative AUI DI

squelch on level for more than 20ns.

When the DI squelch is turned off, the DI squelch off level

is reduced to 2/3 of the DI squelch on level.

The DI squelch circuit will be turned back on if the idle

period is detected by no DI squelch level transitions for

more than 180ns.

An external 78 ohm termination resistor is needed across

DI+ and DI– as shown in Figure 12. The DI+ and DI–

inputs can be coupled from an external MAU into the

ML2652 with either capacitors or a transformer. The

ML2652 meets all AUI receiver specifications outlined in

IEEE 802.3–1988 Section 7.

CI+ and CI– are inputs from the external MAU which

contain the 10 MHz ± 15% collision signal as defined in

IEEE 802.3–1988 Section 7. The CI+ and CI– inputs

contain the same squelch circuit used on the DI inputs

described in previous paragraphs in this section.

An external 78 ohm termination resistor is needed across

CI+ and CI– as shown in Figure 12. The CI+ and CI– inputs

can be coupled from an external MAU into the ML2652

with either capacitors (shown in Figure 12) or a

transformer. The ML2652 meets all AUI receiver

specifications outlined in IEEE 802.3–1988 Section 7.

The ML2652 contains an AUI/TP select input pin which

controls whether the AUI or twisted pair interface is to be

used for data transmission and reception. When AUI/

Twisted Pair Switching = High, the AUI is used for data

transmission and reception. When AUI/Twisted Pair

Switching = Low, the twisted pair interface is used for data

transmission and reception.

The AUISEL pin is a digital status output that indicates

which interface has been selected for data transfer, either

twisted pair or AUI. The pin consists of an open drain

output with an internal pull-up resistor and can drive an

LED from VCC or another digital input. AUISEL = High

indicates that the twisted pair interface has been selected.

AUISEL = Low indicates that the AUI interface has been

selected.

The ML2652 has the capability to automatically select

between the twisted pair interface and AUI. This automatic

interface selection is accomplished by tying the LTP

output pin to the AUI/TP input pin. When these two pins

are connected together, if valid link pulses are detected, it

is assumed that the twisted pair interface is being used.

This causes LTP output to go low, thus forcing AUI/TP low,

and thus enabling the twisted pair interface. If no valid

link pulses are detected, it is assumed that the twisted pair

interface is not being used, thus causing LTP to go high,

thus forcing AUI/TP high, thus enabling the AUI interface.

If valid link pulses reappear, the device will automatically

disable the AUI and enable the twisted pair interface. The

algorithm for determining valid link pulses is described in

the Link Pulse section.

LOOPBACK

LPBK provides a loopback through the manchester

encoder/decoder, but not through the on-chip 10BASE-T

MAU. No data will go out on either the AUI port or the

twisted pair port in this mode. This same function is found

on many discrete manchester encoder/decoders.

IEEE 802.3 MAUs normally loop the transmit data (DO+)

when transmitting with no collisions. When using an

external transceiver through the ML2652's AUI port, the

controller can first check the local loopback by setting

LPBK. If it passes this test it can then check the AUI cable

and external MAU by doing the normal MAU loopback.

FULL DUPLEX OPERATION

The ML2652 and ML2653 are capable of operating in the

full duplex mode which transmits and receives data

simultaneously. In the full duplex mode the collision

circuitry is disabled just as it is in the loopback mode. To

achieve full duplex operation the full duplex pin FD is

enabled and the loopback pin LPBK must be disabled.

Both of these conditions must be present to operate in the

full duplex mode.

CONTROLLER INTERFACE

The ML2652 and ML2653 has a flexible and

programmable digital interface which enables it to directly

interface to Ethernet controllers manufactured by Intel,

AMD, National and Seeq.

FUNCTIONAL DESCRIPTION (Continued)

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