9

ML4411/ML4411A

BRAKING

As shown in figure 9, the braking circuit pulls the N-

Channel MOSFET gates high when BRAKE falls below a

before the braking circuit is activated. The N-Channel

buffer (B1) tri-states when the BRAKE pin reaches 2.1V to

down transistor in B1. To brake the motor with external

signals, first disable power by pulling pin 8 low, then pull

pin 26 below 1.4V using an open drain (or diode isolated)

output.

The bias current for the Braking circuits comes from

VCC2. When the N-Channel MOSFETs turn on, no

additional power is generated for VCC2 (motor back-EMF

rectified through out the MOSFET body diodes). After

VCC2 drops below 4V, Q2 turns off. Continued braking

the MOSFET gate enhancement voltage.

0

0.01

0.02

0.03

0.04

0.05

60

50

40

30

20

10

0

P3 ONLY

–

+

VCC2 – 3V

COMM. LOGIC

26

8

27

28

12

BRAKE

1.4V

–

+

A4

A6

VCC2

DIS PWR

COMMUTATION

LOGIC

UVLO

–

+

A3

–

+

A2

A1

Q

ONE

SHOT

Q2

VCC

VCC2

7

P1 . . . P3

N1 . . . N3

VIN

13

6

B1

VCC

2.1V

–

+

A5

VCC2

DIS PWR

VCC2

16K

POWER FAIL

4.5K

17

+5

UVLO

Q1

1K

TRI-

ST.

Figure 9. Current Control, Output Drive and Braking Circuits.