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ML4803CS-2 数据表(PDF) 10 Page - Micro Linear Corporation |
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ML4803CS-2 数据表(HTML) 10 Page - Micro Linear Corporation |
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10 / 13 page ![]() ML4803 10 February 1999 inductor. The VCC OVP comparator senses when this voltage exceeds 16V, and terminates the PFC output drive while disabling the VEAO current sink. Once the VEAO current sink is disabled, the VEAO voltage will charge unabated, except for a diode clamp to VCC, reducing the PFC pulse width. Once the VCC rail has decreased to below 16.2V the VEAO sink will be enabled, discharging external VEAO compensation components until the steady state voltage is reached. Given that 15V on VCC corresponds to 400V on the PFC output, 16V on VCC corresponds to an OVP level of 426V. COMPONENT REDUCTION Components associated with the VRMS and IRMS pins of a typical PFC controller such as the ML4824 have been eliminated. The PFC power limit and bandwidth does vary with line voltage. Double the power can be delivered from a 220 V AC line versus a 110 V AC line. Since this is a combination PFC/PWM, the power to the load is limited by the PWM stage. Figure 11. ML4803 PFC Control Figure 10. Typical Peak Current Mode Waveforms TYPICAL APPLICATIONS (Continued) VISENSE VC1 RAMP GATE DRIVE OUTPUT CZERO ISENSE VC1 5V VI SENSE GATE OUTPUT RCOMP RP VOUT = 400V VEAO 35µA R1 4 + – COMP –4 3 CCOMP C1 30pF |
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