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ML4833CS 数据表(PDF) 8 Page - Micro Linear Corporation |
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ML4833CS 数据表(HTML) 8 Page - Micro Linear Corporation |
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8 / 13 page ![]() ML4833 8 The oscillator frequency is determined by the following equations: F tt OSC CHG DIS = + 1 (3) and tR C In VI R V VI R V CHG T T REF CH T TL REF CH T TH = +− +− (4) The oscillator’s minimum frequency is set when ICH = 0 where: F RC OSC TT ≅ × 1 051 . (5) Figure 4 shows the output configuration for the operational transconductance amplifiers. CURRENT MIRROR IN OUT CURRENT MIRROR IN OUT gmVIN io = gmVIN IQ + 2 gmVIN IQ – 2 Figure 4. Output Configuration A DC path to ground or VCC at the output of the transconductance amplifiers will introduce an offset error. The magnitude of the offset voltage that will appear at the input is given by VOS = io/gm. For an io of 1µA and a gm of 0.05 µ W the input referred offset will be 20mV. Capacitor C1 as shown in Figure 3 is used to block the DC current to minimize the adverse effect of offsets. Slew rate enhancement is incorporated into all of the operational transconductance amplifiers in the ML4833. This improves the recovery of the circuit in response to power up and transient conditions. The response to large signals will be somewhat non-linear as the transconductance amplifiers change from their low to high transconductance mode. This is illustrated in Figure 5. VIN Differential Linear Slope Region 0 iO Figure 5. Transconductance Amplifier Characteristics BALLAST OUTPUT SECTION The IC controls output power to the lamps via frequency modulation with non-overlapping conduction. This means that both ballast output drivers will be low during the discharging time tDIS of the oscillator capacitor CT. OSCILLATOR The VCO frequency ranges are controlled by the output of the LFB amplifier (RSET). As lamp current increases, LFB OUT falls in voltage, causing the CT charging current to increase, thereby causing the oscillator frequency to increase. Since the ballast output network attenuates high frequencies, the power to the lamp will be decreased. 17 + – 1.25/3.75 7 CT VREF ICHG VREF CONTROL RT/CT RT 5.5mA CLOCK CT VTH = 3.75V VTL = 1.25V tDIS tCHG Figure 6. Oscillator Block Diagram and Timing |
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