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ML4895ES 数据表(PDF) 2 Page - Micro Linear Corporation |
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ML4895ES 数据表(HTML) 2 Page - Micro Linear Corporation |
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2 / 10 page ![]() ML4895 2 PIN CONFIGURATION PIN DESCRIPTION PIN# NAME FUNCTION 1VREG Connection point for internal linear regulator bypass capacitor 2VFB Programming pin for setting the output voltage 3ISENSE Current sense input 4 SHDN a logic low on this pin shuts down the regulator and all internal bias circuitry for minimum power consumption ML4895 8-Pin SOIC (S08) PIN# NAME FUNCTION 5 GND Analog signal ground 6 N DRV NMOS driver output 7 P DRV PMOS driver output 8VIN Battery input voltage 1 2 3 4 8 7 6 5 VREG VFB ISENSE SHDN VIN P DRV N DRV GND TOP VIEW |
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