Micro Linear

1

Micro Linear

March 1997

ML6622

*

High-Speed Data Quantizer

ECL OUT+

ECL OUT–

ENABLE

LINK+

LINK–

GND

GNDA

CAP

THIN

TIMER

LINK

OUT

THRESH

REF

FILTER

AMP

ECL

CMP

LINK DETECT

14

11

3

6

4

5

1

7

8

2

16

10

15

9

12

13

BLOCK DIAGRAM

FEATURES

s

200 MHz bandwidth

s

Low noise design

s

Adjustable Link Detect function

s

Low power design: 35mA typical

s

Used with the ML6633 LED driver

APPLICATIONS

s

FDDI

s

Fast Ethernet, 100BASE-FX

s

ATM (SONET), 155Mbps

s

Fibre Channel, 133 or 266Mbps

s

Proprietary high-speed fiber optic data links

GENERAL DESCRIPTION

The ML6622 high-speed data quantizer (post-amplifier) is

a low noise, wide-band, BiCMOS monolithic IC designed

for high-speed signal recovery applications, such as FDDI,

Fast Ethernet, and ATM. An internal DC restoration

feedback loop nulls any offset voltage produced in the

input stage. The limiting amplifier contributes to a high

level of sensitivity and a minimum of duty cycle

distortion.

The output of the data path is a high-speed comparator

with ECL outputs. An enable pin gates the comparator on

or off in response to the input signal level or a system

control signal.

The Link Detect circuit provides an Assert-Deassert

function with a user-selectable threshold voltage. This

circuit monitors the input signal and provides an ECL High

output within 100ms of signal acquisition and an ECL Low

output within 350ms of signal loss. The ECL discriminator

output can be used to disable the comparator when the

signal is below the user-selected threshold. LINKLED

drives an LED for a visible indication of the link status.

*Some Packages Are Obsolete