LC75813E, 75813T

No.7159-2/26

Specifications

Absolute Maximum Ratings at Ta = 25

C, VSS = 0V

Parameter

Symbol

Conditions

Ratings

unit

Maximum supply voltage

VDD max

VDD

–0.3 to +7.0

V

VLCD max

VLCD

–0.3 to +7.0

Input voltage

VIN1

CE, CL, DI, INH

–0.3 to +7.0

V

VIN2

OSC

–0.3 to VDD +0.3

VIN3

VLCD1, VLCD2

–0.3 to VLCD +0.3

Output voltage

VOUT1

OSC

–0.3 to VDD +0.3

V

VOUT2

S1 to S87, COM1 to COM4, P1 to P8

–0.3 to VLCD +0.3

Output current

IOUT1

S1 to S87

300

A

IOUT2

COM1 to COM4

3

mA

IOUT3

P1 to P8

5mA

Allowable power dissipation

Pd max

Ta = 85°C

200

mW

Operating temperature

Topr

–40 to +85

C

Storage temperature

Tstg

–55 to +125

C

Allowable Operating Ranges at Ta =

40 to +85C, VSS = 0V

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Supply voltage

VDD

VDD

2.7

6.0

V

VLCD

VLCD

2.7

6.0

Input voltage

VLCD1

VLCD1

2/3VLCD

VLCD

V

VLCD2

VLCD2

1/3VLCD

VLCD

Input high-level voltage

VIH

CE, CL, DI, INH

0.8VDD

6.0

V

Input low-level voltage

VIL

CE, CL, DI, INH

0

0.2VDD

V

Recommended external

resistance

ROSC

OSC

39

k



Recommended external

capacitance

COSC

OSC

1000

pF

Guaranteed oscillation range

fOSC

OSC

19

38

76

kHz

Data setup time

tds

CL, DI : Figure 2

160

ns

Data hold time

tdh

CL, DI : Figure 2

160

ns

CE wait time

tcp

CE, CL : Figure 2

160

ns

CE setup time

tcs

CE, CL : Figure 2

160

ns

CE hold time

tch

CE, CL : Figure 2

160

ns

High-level clock pulse width

t

CL : Figure 2

160

ns

Low-level clock pulse width

t

CL : Figure 2

160

ns

Rise time

tr

CE, CL, DI : Figure 2

160

ns

Fall time

tf

CE, CL, DI : Figure 2

160

ns

INH switching time

tc

INH, CE : Figure 3

10

s

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,

damage may occur and reliability may be affected.