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HDV24VL 数据表(PDF) 13 Page - AMIC Technology

部件名 HDV24VL
功能描述  2.8 Volt x16 Very Low Power Dual-Port Static RAM
PDF  18 Pages
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制造商  AMICC [AMIC Technology]
网页  http://www.amictechnology.com
标志 AMICC - AMIC Technology

HDV24VL 数据表(HTML) 13 Page - AMIC Technology

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© 2003 High Bandwidth Access, Inc. All rights reserved. Product specifications subject to change without notice.
HDV24VL
October 2003
ADP II
3HD166B
Page 13 of 13
A0-A2
SEM
I/O
R/W
OE
Valid Address
Valid Address
tSAA
tACE
tWR
tAW
tEW
tSOP
t OH
DATAOUT Valid (2)
DATAIN Valid
tDW
tDH
tWP
t AS
tSWRD
tAOE
Write Cycle
Read Cycle
NOTES:
1. CE
_____
= VIH or UB
______
and LB
______
= VIH for the duration of the above timing (both write and read cycle) .
2. “DATA OUT VALID” represents all I/O’s (I/O0-15) equal to the semaphore value.
Diagram 5. Semaphore Read after Write Timing, Either Side
SIDE A
SIDE B
A0A-A2A
R/WA
SEMA
A0B-A2B
R/WB
SEM B
Match
Match
t SPS
NOTES:
1. DOR = DOL = VIL, CE
_____
L
= CE
_____
R
=VIH or both UB
______
and LB
______
=VIH.
2. Timing for both ports is the same. Port B is opposite of port A.
3. This parameter is measured from R/W
____
A
or SEM
________
A
=VIH to R/W
____
B
or SEM
________
B
= VIH.
4. The semaphore will be sent to either side if tSPS is not met. It cannot be guaranteed which side receives semaphore.
.
Diagram 6. Semaphore Write Contention



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