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AX5243 数据表(PDF) 21 Page - ON Semiconductor |
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AX5243 数据表(HTML) 21 Page - ON Semiconductor |
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21 / 65 page ![]() Specifications www.onsemi.com AX5243 21 Receiver and Transmitter Settling Phases SYMBOL DESCRIPTION CONDITION MIN TYP MAX UNIT Txtal XTAL settling time Powermodes: POWERDOWN to STANDBY Note that Txtal depends on the specific crystal used. 0.5 ms Tsynth Synthesizer settling time Powermodes: STANDBY to SYNTHTX or SYNTHRX 40 μs Ttx TX settling time Powermodes: SYNTHTX to FULLTX Ttx is the time used for power ramping, this can be programmed to be 1 x tbit, 2 x tbit, 4 x tbit or 8 x tbit. Note 1, 2 0 1 x tbit 8 x tbit μs Trx_init RX initialization time 150 μs Trx_rssi RX RSSI acquisition time (after Trx_init) Powermodes: SYNTHRX to FULLRX Modulation (G)FSK Note 1, 2 80 + 3 x tbit μs Trx_preamble RX signal acquisition time to valid data RX at full sensitivity/selectivity (after Trx_init) 9 x tbit Notes 1. tbit depends on the datarate, e.g. for 10 kbps tbit = 100 μs 2. In wire mode there is a processing delay of typically 6 x tbit between antenna and DCLK/DATA pins |
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